Rev 223 | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | SVN | RSS feed
| Rev 223 | Rev 225 | ||
|---|---|---|---|
| Line 22... | Line 22... | ||
| 22 | cli(); |
22 | cli(); |
| 23 | while(1); |
23 | while(1); |
| 24 | }; |
24 | }; |
| 25 | 25 | ||
| 26 | void bios_putchar(char c) { |
26 | void bios_putchar(char c) { |
| - | 27 | #if defined(__AVR_ATmega8__) |
|
| 27 | loop_until_bit_is_set(UCSRA, UDRE); |
28 | loop_until_bit_is_set(UCSRA, UDRE); |
| 28 | UDR = c; |
29 | UDR = c; |
| - | 30 | #elif defined(__AVR_ATmega88__) |
|
| - | 31 | loop_until_bit_is_set(UCSR0A, UDRE0); |
|
| - | 32 | UDR0 = c; |
|
| - | 33 | #endif |
|
| 29 | }; |
34 | }; |
| 30 | 35 | ||
| 31 | char bios_getchar(void) { |
36 | char bios_getchar(void) { |
| - | 37 | #if defined(__AVR_ATmega8__) |
|
| 32 | loop_until_bit_is_set(UCSRA, RXC); |
38 | loop_until_bit_is_set(UCSRA, RXC); |
| 33 | return UDR; |
39 | return UDR; |
| - | 40 | #elif defined(__AVR_ATmega88__) |
|
| - | 41 | loop_until_bit_is_set(UCSR0A, RXC0); |
|
| - | 42 | return UDR0; |
|
| - | 43 | #endif |
|
| 34 | }; |
44 | }; |
| 35 | 45 | ||
| 36 | long timebase_get(void) { |
46 | long timebase_get(void) { |
| 37 | uint8_t sreg; |
47 | uint8_t sreg; |
| 38 | long res; |
48 | long res; |
| Line 125... | Line 135... | ||
| 125 | 135 | ||
| 126 | int main() { |
136 | int main() { |
| 127 | void (*app_reset)(void) = 0; |
137 | void (*app_reset)(void) = 0; |
| 128 | 138 | ||
| 129 | // Setup USART for debug channel |
139 | // Setup USART for debug channel |
| - | 140 | #if defined(__AVR_ATmega8__) |
|
| 130 | UCSRB = _BV(RXEN)|_BV(TXEN); |
141 | UCSRB = _BV(RXEN)|_BV(TXEN); |
| 131 | UBRRL = (F_CPU / 16 / F_BAUD) - 1; |
142 | UBRRL = (F_CPU / 16 / F_BAUD) - 1; |
| - | 143 | #elif defined(__AVR_ATmega88__) |
|
| - | 144 | UCSR0B = _BV(RXEN0)|_BV(TXEN0); |
|
| - | 145 | UBRR0L = (F_CPU / 16 / F_BAUD) - 1; |
|
| - | 146 | #endif |
|
| 132 | stdout = &bios_stdio; |
147 | stdout = &bios_stdio; |
| 133 | stdin = &bios_stdio; |
148 | stdin = &bios_stdio; |
| 134 | 149 | ||
| 135 | // Initialize a suitable hardware timer to create a 1KHz interrupt. |
150 | // Initialize a suitable hardware timer to create a 1KHz interrupt. |
| 136 | TIMEBASE_INIT(); |
151 | TIMEBASE_INIT(); |
| Line 138... | Line 153... | ||
| 138 | // Enable watchdog timer to protect against an application locking the |
153 | // Enable watchdog timer to protect against an application locking the |
| 139 | // node by leaving interrupts disabled. |
154 | // node by leaving interrupts disabled. |
| 140 | wdt_enable(WDTO_500MS); |
155 | wdt_enable(WDTO_500MS); |
| 141 | 156 | ||
| 142 | // Move interrupt vectors to start of bootloader section and enable interrupts |
157 | // Move interrupt vectors to start of bootloader section and enable interrupts |
| - | 158 | #if defined(__AVR_ATmega8__) |
|
| 143 | GICR = _BV(IVCE); |
159 | GICR = _BV(IVCE); |
| 144 | GICR = _BV(IVSEL); |
160 | GICR = _BV(IVSEL); |
| - | 161 | #elif defined(__AVR_ATmega88__) |
|
| - | 162 | MCUCR = _BV(IVCE); |
|
| - | 163 | MCUCR = _BV(IVSEL); |
|
| - | 164 | #endif |
|
| 145 | sei(); |
165 | sei(); |
| 146 | 166 | ||
| 147 | printf("AVR BIOS\n"); |
167 | printf("AVR BIOS\n"); |
| 148 | 168 | ||
| 149 | if (pgm_read_word(0) != 0xffff) { |
169 | if (pgm_read_word(0) != 0xffff) { |