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#include <avr/interrupt.h>
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#include <avr/interrupt.h>
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/*-----------------------------------------------------------------------------
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/*-----------------------------------------------------------------------------
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 * Prerequisites
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 * Prerequisites
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 *---------------------------------------------------------------------------*/
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 *---------------------------------------------------------------------------*/
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//TODO: Use this define, might fix the bug
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#ifndef IR_RX_ACTIVE_LOW
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#define IR_RX_ACTIVE_LOW    1
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#endif
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 - 
 
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#ifndef IR_TX_ACTIVE_LOW
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#define IR_TX_ACTIVE_LOW    0
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#endif
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#ifndef IR_TX_ENABLE
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#define IR_TX_ENABLE    0
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#endif
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#ifndef IR_RX_ENABLE
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#define IR_RX_ENABLE    0
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#endif
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#if defined(__AVR_ATmega8__) || defined(__AVR_ATmega16__) || defined(__AVR_ATmega32__)
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#if defined(__AVR_ATmega8__) || defined(__AVR_ATmega16__) || defined(__AVR_ATmega32__)
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#define TIMSK1  TIMSK
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#define TIMSK1  TIMSK
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#define TIFR1   TIFR
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#define TIFR1   TIFR
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#define ICIE1   TICIE1
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#define ICIE1   TICIE1
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#endif
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#endif
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#define IR_MASK_TIMEOUT()       TIMSK1 &= ~(1<<OCIE1A);
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#define IR_MASK_TIMEOUT()       TIMSK1 &= ~(1<<OCIE1A);
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#define IR_UNMASK_TIMEOUT()     TIFR1 = (1<<OCF1A); TIMSK1 |= (1<<OCIE1A);
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#define IR_UNMASK_TIMEOUT()     TIFR1 = (1<<OCF1A); TIMSK1 |= (1<<OCIE1A);
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#define IR_MASK_CAPTURE()       TIMSK1 &= ~(1<<ICIE1);
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#define IR_MASK_CAPTURE()       TIMSK1 &= ~(1<<ICIE1);
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#define IR_UNMASK_CAPTURE()     TIFR1 = (1<<ICF1); TIMSK1 |= (1<<ICIE1);
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#define IR_UNMASK_CAPTURE()     TIFR1 = (1<<ICF1); TIMSK1 |= (1<<ICIE1);
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#define IR_CAPTURE_FALLING()    TCCR1B &= ~(1<<ICES1); \
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#define IR_CAPTURE_FALLING()    TCCR1B &= ~(1<<ICES1); \
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                                TIFR1 = (1<<ICF1);
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                                TIFR1 = (1<<ICF1);
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#define IR_CAPTURE_RISING()     TCCR1B |= (1<<ICES1); \
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#define IR_CAPTURE_RISING()     TCCR1B |= (1<<ICES1); \
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                                TIFR1 = (1<<ICF1);
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                                TIFR1 = (1<<ICF1);
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//#define IR_OUTP_HIGH()            TCCR0A |= (1<<COM0A0);
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//#define IR_OUTP_HIGH()            TCCR0A |= (1<<COM0A0);
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//#define IR_OUTP_LOW()         TCCR0A &= ~(1<<COM0A0);
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//#define IR_OUTP_LOW()         TCCR0A &= ~(1<<COM0A0);
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#define IR_OUTP_HIGH()  *drvIrTxChannel[channel].port &= ~drvIrTxChannel[channel].pinmask
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#define IR_OUTP_HIGH()  *drvIrTxChannel[channel].port &= ~drvIrTxChannel[channel].pinmask
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#define IR_OUTP_LOW()   *drvIrTxChannel[channel].port |= drvIrTxChannel[channel].pinmask
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#define IR_OUTP_LOW()   *drvIrTxChannel[channel].port |= drvIrTxChannel[channel].pinmask
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#else
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#else
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#define IR_OUTP_HIGH()  *drvIrTxChannel[channel].port |= drvIrTxChannel[channel].pinmask
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#define IR_OUTP_HIGH()  *drvIrTxChannel[channel].port |= drvIrTxChannel[channel].pinmask
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#define IR_OUTP_LOW()   *drvIrTxChannel[channel].port &= ~drvIrTxChannel[channel].pinmask
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#define IR_OUTP_LOW()   *drvIrTxChannel[channel].port &= ~drvIrTxChannel[channel].pinmask
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#endif
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#endif
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/*-----------------------------------------------------------------------------
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/*-----------------------------------------------------------------------------
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 * Globals
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 * Globals
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 *---------------------------------------------------------------------------*/
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 *---------------------------------------------------------------------------*/
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#if IR_RX_ENABLE==1
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#if IR_RX_ENABLE==1
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struct {
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struct {
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 93 
 
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/*-----------------------------------------------------------------------------
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/*-----------------------------------------------------------------------------
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 * Interrupt Handlers
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 * Interrupt Handlers
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 *---------------------------------------------------------------------------*/
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 *---------------------------------------------------------------------------*/
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 - 
 
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/*
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timer 1 has two comprare registers and compare ISRs, one is used below for "timeout" on receive and the other is used here for transmitter
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//TODO: how to handle more than one transmitter on one compare interrupt, spara en array med tider och nån enableflagga för varje kanal
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*/
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#if IR_TX_ENABLE==1
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#if IR_TX_ENABLE==1
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ISR(IR_COMPARE_VECTOR)
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ISR(IR_COMPARE_VECTOR)
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{
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{
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 - 
 
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    /* TODO find which channel */
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    /* find which channel */
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    uint16_t time = IR_COMPARE_REG;
- 
 
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    uint16_t diff;
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    uint8_t channel = 0;
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    uint8_t channel;
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- 
 
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    /* go through all channels and check which of thems have overflowed */
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    for (channel=0; channel < IR_SUPPORTED_NUM_CHANNELS; channel++)
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    {
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        /* if channel is waiting for an overflow */
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        if (drvIrTxChannel[channel].timeoutEnable==TRUE)
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        {
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            /* check if channel have overflowed or is about to overflow */
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            diff = (time+50)-drvIrTxChannel[channel].timeout;
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            if (diff < IR_MAX_PULSE_WIDTH)
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            {
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                /* check what to output next */
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    if ((drvIrTxChannel[channel].txindex&1) == 1) {     /* if odd, ir-pause */
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                if ((drvIrTxChannel[channel].txindex&1) == 1) {     /* if odd, ir-pause */
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        IR_OUTP_LOW();
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                    IR_OUTP_LOW();
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    } else {
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                } else {
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        IR_OUTP_HIGH();
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                    IR_OUTP_HIGH();
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    }
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                }
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- 
 
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                /* is there more to send */
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    if (drvIrTxChannel[channel].txindex < drvIrTxChannel[channel].txlen)
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                if (drvIrTxChannel[channel].txindex < drvIrTxChannel[channel].txlen)
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    {
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                {
- 
 
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                    /* load next timeout value */
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        drvIrTxChannel[channel].timeout = IR_COMPARE_REG + drvIrTxChannel[channel].txbuf[drvIrTxChannel[channel].txindex++];
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                    drvIrTxChannel[channel].timeout = IR_COMPARE_REG + drvIrTxChannel[channel].txbuf[drvIrTxChannel[channel].txindex++];
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    }
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                }
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    else
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                else
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    {
 130 
                {
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        //TODO only mask if noone is sending (checked below)
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                    /* disable this channel */
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        IR_MASK_COMPARE();
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        drvIrTxChannel[channel].timeoutEnable = FALSE;
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                    drvIrTxChannel[channel].timeoutEnable = FALSE;
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- 
 
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                    /* disable the overflow interrupt */
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                    IR_MASK_COMPARE();
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        /* Notify the application that a pulse train has been sent. */
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                    /* notify the application that a pulse train has been sent. */
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        drvIrTxChannel[channel].callback(channel);
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                    drvIrTxChannel[channel].callback(channel);
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                }
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            }
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        }
- 
 
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    }
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    channel = 0;
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    diff = 0xffff;
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    /* go through all channels and find the one that have the next overflow */
- 
 
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    for (uint8_t i=0; i < IR_SUPPORTED_NUM_CHANNELS; i++)
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 148 
    {
- 
 
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        /* if channel is waiting for an overflow */
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        if (drvIrTxChannel[i].timeoutEnable==TRUE)
- 
 
 151 
        {
- 
 
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            if (drvIrTxChannel[i].timeout - time < diff)
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 153 
            {
- 
 
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                diff = drvIrTxChannel[i].timeout - time;
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                channel = i;
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            }
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            /* enable overflow interrupt */
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 158 
            IR_UNMASK_COMPARE();
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 159 
        }      
150 
    }
 160 
    }  
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 161 
 
152 
    /* TODO: find channel with lowest time left */
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    /* set compare value to the channel that have the next overflow */
153 
    IR_COMPARE_REG = drvIrTxChannel[channel].timeout;
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    IR_COMPARE_REG = drvIrTxChannel[channel].timeout;
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}
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}
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#endif
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#endif
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 166 
 
157 
#if IR_RX_ENABLE==1
 167 
#if IR_RX_ENABLE==1
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//TODO: hur hantera detta i multi receiver
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//TODO: hur hantera detta i multi receiver
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//TODO: ha en array med tider och nån enableflagga för varje kanal
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//TODO: ha en array med tider och nån enableflagga för varje kanal
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//TODO: mot slutet av ISRen laddas nästa tid in...
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//TODO: mot slutet av ISRen laddas nästa tid in... likadant som för TX, se ovan ISR
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 171 
 
162 
/* When this timeout occurs a pulsetrain is complete */
 172 
/* When this timeout occurs a pulsetrain is complete */
163 
ISR(IR_TIMEOUT_VECTOR)
 173 
ISR(IR_TIMEOUT_VECTOR)
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{
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{
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    /* Find which channel timed out */
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    /* Find which channel timed out */