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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 60 | jimmy | 1 | /************************************************************************* |
| 149 | jimmy | 2 | Title: Interrupt UART library with receive/transmit circular buffers |
| 3 | Author: Peter Fleury <pfleury@gmx.ch> http://jump.to/fleury |
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| 4 | File: $Id: uart.c,v 1.5.2.10 2005/11/15 19:49:12 peter Exp $ |
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| 5 | Software: AVR-GCC 3.3 |
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| 6 | Hardware: any AVR with built-in UART, |
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| 7 | tested on AT90S8515 at 4 Mhz and ATmega at 1Mhz |
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| 60 | jimmy | 8 | |
| 9 | DESCRIPTION: |
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| 10 | An interrupt is generated when the UART has finished transmitting or |
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| 11 | receiving a byte. The interrupt handling routines use circular buffers |
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| 12 | for buffering received and transmitted data. |
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| 13 | |||
| 14 | The UART_RX_BUFFER_SIZE and UART_TX_BUFFER_SIZE variables define |
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| 15 | the buffer size in bytes. Note that these variables must be a |
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| 16 | power of 2. |
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| 17 | |||
| 18 | USAGE: |
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| 19 | Refere to the header file uart.h for a description of the routines. |
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| 20 | See also example test_uart.c. |
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| 21 | |||
| 22 | NOTES: |
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| 23 | Based on Atmel Application Note AVR306 |
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| 24 | |||
| 25 | *************************************************************************/ |
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| 26 | #include <avr/io.h> |
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| 27 | #include <avr/interrupt.h> |
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| 28 | #include <avr/pgmspace.h> |
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| 149 | jimmy | 29 | #include "uart.h" |
| 60 | jimmy | 30 | |
| 31 | |||
| 32 | /* |
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| 33 | * constants and macros |
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| 34 | */ |
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| 35 | |||
| 36 | /* size of RX/TX buffers */ |
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| 37 | #define UART_RX_BUFFER_MASK ( UART_RX_BUFFER_SIZE - 1) |
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| 38 | #define UART_TX_BUFFER_MASK ( UART_TX_BUFFER_SIZE - 1) |
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| 39 | |||
| 40 | #if ( UART_RX_BUFFER_SIZE & UART_RX_BUFFER_MASK ) |
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| 41 | #error RX buffer size is not a power of 2 |
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| 42 | #endif |
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| 43 | #if ( UART_TX_BUFFER_SIZE & UART_TX_BUFFER_MASK ) |
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| 44 | #error TX buffer size is not a power of 2 |
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| 45 | #endif |
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| 46 | |||
| 47 | #if defined(__AVR_AT90S2313__) \ |
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| 48 | || defined(__AVR_AT90S4414__) || defined(__AVR_AT90S4434__) \ |
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| 149 | jimmy | 49 | || defined(__AVR_AT90S8515__) || defined(__AVR_AT90S8535__) \ |
| 50 | || defined(__AVR_ATmega103__) |
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| 51 | /* old AVR classic or ATmega103 with one UART */ |
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| 60 | jimmy | 52 | #define AT90_UART |
| 53 | #define UART0_RECEIVE_INTERRUPT SIG_UART_RECV |
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| 54 | #define UART0_TRANSMIT_INTERRUPT SIG_UART_DATA |
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| 55 | #define UART0_STATUS USR |
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| 56 | #define UART0_CONTROL UCR |
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| 57 | #define UART0_DATA UDR |
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| 58 | #define UART0_UDRIE UDRIE |
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| 59 | #elif defined(__AVR_AT90S2333__) || defined(__AVR_AT90S4433__) |
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| 60 | /* old AVR classic with one UART */ |
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| 61 | #define AT90_UART |
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| 62 | #define UART0_RECEIVE_INTERRUPT SIG_UART_RECV |
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| 63 | #define UART0_TRANSMIT_INTERRUPT SIG_UART_DATA |
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| 64 | #define UART0_STATUS UCSRA |
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| 65 | #define UART0_CONTROL UCSRB |
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| 66 | #define UART0_DATA UDR |
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| 67 | #define UART0_UDRIE UDRIE |
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| 68 | #elif defined(__AVR_ATmega8__) || defined(__AVR_ATmega16__) || defined(__AVR_ATmega32__) \ |
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| 69 | || defined(__AVR_ATmega8515__) || defined(__AVR_ATmega8535__) \ |
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| 149 | jimmy | 70 | || defined(__AVR_ATmega323__) |
| 71 | /* ATmega with one USART */ |
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| 60 | jimmy | 72 | #define ATMEGA_USART |
| 73 | #define UART0_RECEIVE_INTERRUPT SIG_UART_RECV |
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| 74 | #define UART0_TRANSMIT_INTERRUPT SIG_UART_DATA |
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| 75 | #define UART0_STATUS UCSRA |
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| 76 | #define UART0_CONTROL UCSRB |
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| 77 | #define UART0_DATA UDR |
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| 78 | #define UART0_UDRIE UDRIE |
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| 79 | #elif defined(__AVR_ATmega163__) |
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| 149 | jimmy | 80 | /* ATmega163 with one UART */ |
| 60 | jimmy | 81 | #define ATMEGA_UART |
| 82 | #define UART0_RECEIVE_INTERRUPT SIG_UART_RECV |
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| 83 | #define UART0_TRANSMIT_INTERRUPT SIG_UART_DATA |
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| 84 | #define UART0_STATUS UCSRA |
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| 85 | #define UART0_CONTROL UCSRB |
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| 86 | #define UART0_DATA UDR |
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| 87 | #define UART0_UDRIE UDRIE |
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| 88 | #elif defined(__AVR_ATmega162__) |
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| 149 | jimmy | 89 | /* ATmega with two USART */ |
| 60 | jimmy | 90 | #define ATMEGA_USART0 |
| 91 | #define ATMEGA_USART1 |
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| 92 | #define UART0_RECEIVE_INTERRUPT SIG_USART0_RECV |
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| 93 | #define UART1_RECEIVE_INTERRUPT SIG_USART1_RECV |
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| 94 | #define UART0_TRANSMIT_INTERRUPT SIG_USART0_DATA |
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| 95 | #define UART1_TRANSMIT_INTERRUPT SIG_USART1_DATA |
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| 96 | #define UART0_STATUS UCSR0A |
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| 97 | #define UART0_CONTROL UCSR0B |
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| 98 | #define UART0_DATA UDR0 |
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| 99 | #define UART0_UDRIE UDRIE0 |
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| 100 | #define UART1_STATUS UCSR1A |
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| 101 | #define UART1_CONTROL UCSR1B |
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| 102 | #define UART1_DATA UDR1 |
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| 103 | #define UART1_UDRIE UDRIE1 |
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| 104 | #elif defined(__AVR_ATmega64__) || defined(__AVR_ATmega128__) |
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| 149 | jimmy | 105 | /* ATmega with two USART */ |
| 60 | jimmy | 106 | #define ATMEGA_USART0 |
| 107 | #define ATMEGA_USART1 |
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| 108 | #define UART0_RECEIVE_INTERRUPT SIG_UART0_RECV |
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| 109 | #define UART1_RECEIVE_INTERRUPT SIG_UART1_RECV |
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| 110 | #define UART0_TRANSMIT_INTERRUPT SIG_UART0_DATA |
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| 111 | #define UART1_TRANSMIT_INTERRUPT SIG_UART1_DATA |
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| 112 | #define UART0_STATUS UCSR0A |
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| 113 | #define UART0_CONTROL UCSR0B |
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| 114 | #define UART0_DATA UDR0 |
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| 115 | #define UART0_UDRIE UDRIE0 |
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| 116 | #define UART1_STATUS UCSR1A |
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| 117 | #define UART1_CONTROL UCSR1B |
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| 118 | #define UART1_DATA UDR1 |
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| 119 | #define UART1_UDRIE UDRIE1 |
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| 120 | #elif defined(__AVR_ATmega161__) |
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| 121 | /* ATmega with UART */ |
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| 122 | #error "AVR ATmega161 currently not supported by this libaray !" |
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| 149 | jimmy | 123 | #elif defined(__AVR_ATmega169__) |
| 124 | /* ATmega with one USART */ |
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| 125 | #define ATMEGA_USART |
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| 126 | #define UART0_RECEIVE_INTERRUPT SIG_USART_RECV |
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| 127 | #define UART0_TRANSMIT_INTERRUPT SIG_USART_DATA |
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| 128 | #define UART0_STATUS UCSRA |
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| 129 | #define UART0_CONTROL UCSRB |
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| 130 | #define UART0_DATA UDR |
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| 131 | #define UART0_UDRIE UDRIE |
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| 132 | #elif defined(__AVR_ATmega48__) ||defined(__AVR_ATmega88__) || defined(__AVR_ATmega168__) |
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| 133 | #define ATMEGA_USART0 |
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| 134 | #define UART0_RECEIVE_INTERRUPT SIG_USART_RECV |
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| 135 | #define UART0_TRANSMIT_INTERRUPT SIG_USART_DATA |
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| 136 | #define UART0_STATUS UCSR0A |
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| 137 | #define UART0_CONTROL UCSR0B |
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| 138 | #define UART0_DATA UDR0 |
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| 139 | #define UART0_UDRIE UDRIE0 |
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| 140 | #elif defined(__AVR_ATtiny2313__) |
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| 141 | #define ATMEGA_USART |
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| 142 | #define UART0_RECEIVE_INTERRUPT SIG_USART0_RX |
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| 143 | #define UART0_TRANSMIT_INTERRUPT SIG_USART0_UDRE |
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| 144 | #define UART0_STATUS UCSRA |
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| 145 | #define UART0_CONTROL UCSRB |
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| 146 | #define UART0_DATA UDR |
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| 147 | #define UART0_UDRIE UDRIE |
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| 148 | #else |
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| 149 | #error "no UART definition for MCU available" |
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| 60 | jimmy | 150 | #endif |
| 151 | |||
| 152 | |||
| 153 | /* |
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| 154 | * module global variables |
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| 155 | */ |
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| 156 | static volatile unsigned char UART_TxBuf[UART_TX_BUFFER_SIZE]; |
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| 157 | static volatile unsigned char UART_RxBuf[UART_RX_BUFFER_SIZE]; |
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| 158 | static volatile unsigned char UART_TxHead; |
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| 159 | static volatile unsigned char UART_TxTail; |
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| 160 | static volatile unsigned char UART_RxHead; |
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| 161 | static volatile unsigned char UART_RxTail; |
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| 162 | static volatile unsigned char UART_LastRxError; |
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| 163 | |||
| 149 | jimmy | 164 | #if defined( ATMEGA_USART1 ) |
| 165 | static volatile unsigned char UART1_TxBuf[UART_TX_BUFFER_SIZE]; |
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| 166 | static volatile unsigned char UART1_RxBuf[UART_RX_BUFFER_SIZE]; |
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| 167 | static volatile unsigned char UART1_TxHead; |
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| 168 | static volatile unsigned char UART1_TxTail; |
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| 169 | static volatile unsigned char UART1_RxHead; |
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| 170 | static volatile unsigned char UART1_RxTail; |
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| 171 | static volatile unsigned char UART1_LastRxError; |
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| 172 | #endif |
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| 60 | jimmy | 173 | |
| 174 | |||
| 149 | jimmy | 175 | |
| 176 | SIGNAL(UART0_RECEIVE_INTERRUPT) |
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| 60 | jimmy | 177 | /************************************************************************* |
| 178 | Function: UART Receive Complete interrupt |
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| 179 | Purpose: called when the UART has received a character |
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| 180 | **************************************************************************/ |
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| 181 | { |
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| 182 | unsigned char tmphead; |
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| 183 | unsigned char data; |
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| 184 | unsigned char usr; |
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| 185 | unsigned char lastRxError; |
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| 186 | |||
| 187 | |||
| 188 | /* read UART status register and UART data register */ |
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| 189 | usr = UART0_STATUS; |
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| 190 | data = UART0_DATA; |
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| 191 | |||
| 192 | /* */ |
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| 193 | #if defined( AT90_UART ) |
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| 194 | lastRxError = (usr & (_BV(FE)|_BV(DOR)) ); |
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| 195 | #elif defined( ATMEGA_USART ) |
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| 196 | lastRxError = (usr & (_BV(FE)|_BV(DOR)) ); |
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| 197 | #elif defined( ATMEGA_USART0 ) |
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| 198 | lastRxError = (usr & (_BV(FE0)|_BV(DOR0)) ); |
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| 199 | #elif defined ( ATMEGA_UART ) |
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| 200 | lastRxError = (usr & (_BV(FE)|_BV(DOR)) ); |
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| 201 | #endif |
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| 202 | |||
| 203 | /* calculate buffer index */ |
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| 204 | tmphead = ( UART_RxHead + 1) & UART_RX_BUFFER_MASK; |
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| 205 | |||
| 206 | if ( tmphead == UART_RxTail ) { |
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| 207 | /* error: receive buffer overflow */ |
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| 208 | lastRxError = UART_BUFFER_OVERFLOW >> 8; |
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| 209 | }else{ |
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| 210 | /* store new index */ |
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| 211 | UART_RxHead = tmphead; |
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| 212 | /* store received data in buffer */ |
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| 213 | UART_RxBuf[tmphead] = data; |
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| 214 | } |
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| 149 | jimmy | 215 | UART_LastRxError = lastRxError; |
| 60 | jimmy | 216 | } |
| 217 | |||
| 218 | |||
| 149 | jimmy | 219 | SIGNAL(UART0_TRANSMIT_INTERRUPT) |
| 60 | jimmy | 220 | /************************************************************************* |
| 221 | Function: UART Data Register Empty interrupt |
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| 222 | Purpose: called when the UART is ready to transmit the next byte |
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| 223 | **************************************************************************/ |
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| 224 | { |
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| 225 | unsigned char tmptail; |
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| 226 | |||
| 227 | |||
| 228 | if ( UART_TxHead != UART_TxTail) { |
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| 229 | /* calculate and store new buffer index */ |
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| 230 | tmptail = (UART_TxTail + 1) & UART_TX_BUFFER_MASK; |
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| 231 | UART_TxTail = tmptail; |
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| 232 | /* get one byte from buffer and write it to UART */ |
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| 233 | UART0_DATA = UART_TxBuf[tmptail]; /* start transmission */ |
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| 234 | }else{ |
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| 235 | /* tx buffer empty, disable UDRE interrupt */ |
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| 236 | UART0_CONTROL &= ~_BV(UART0_UDRIE); |
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| 237 | } |
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| 238 | } |
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| 239 | |||
| 240 | |||
| 241 | /************************************************************************* |
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| 242 | Function: uart_init() |
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| 243 | Purpose: initialize UART and set baudrate |
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| 244 | Input: baudrate using macro UART_BAUD_SELECT() |
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| 245 | Returns: none |
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| 246 | **************************************************************************/ |
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| 149 | jimmy | 247 | void uart_init(unsigned int baudrate) |
| 60 | jimmy | 248 | { |
| 249 | UART_TxHead = 0; |
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| 250 | UART_TxTail = 0; |
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| 251 | UART_RxHead = 0; |
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| 252 | UART_RxTail = 0; |
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| 253 | |||
| 254 | #if defined( AT90_UART ) |
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| 255 | /* set baud rate */ |
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| 256 | UBRR = (unsigned char)baudrate; |
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| 257 | |||
| 258 | /* enable UART receiver and transmmitter and receive complete interrupt */ |
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| 149 | jimmy | 259 | UART0_CONTROL = _BV(RXCIE)|_BV(RXEN)|_BV(TXEN); |
| 60 | jimmy | 260 | |
| 261 | #elif defined (ATMEGA_USART) |
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| 262 | /* Set baud rate */ |
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| 149 | jimmy | 263 | if ( baudrate & 0x8000 ) |
| 264 | { |
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| 265 | UART0_STATUS = (1<<U2X); //Enable 2x speed |
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| 266 | baudrate &= ~0x8000; |
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| 267 | } |
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| 60 | jimmy | 268 | UBRRH = (unsigned char)(baudrate>>8); |
| 269 | UBRRL = (unsigned char) baudrate; |
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| 149 | jimmy | 270 | |
| 60 | jimmy | 271 | /* Enable USART receiver and transmitter and receive complete interrupt */ |
| 272 | UART0_CONTROL = _BV(RXCIE)|(1<<RXEN)|(1<<TXEN); |
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| 273 | |||
| 274 | /* Set frame format: asynchronous, 8data, no parity, 1stop bit */ |
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| 275 | #ifdef URSEL |
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| 276 | UCSRC = (1<<URSEL)|(3<<UCSZ0); |
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| 277 | #else |
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| 278 | UCSRC = (3<<UCSZ0); |
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| 279 | #endif |
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| 280 | |||
| 281 | #elif defined (ATMEGA_USART0 ) |
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| 282 | /* Set baud rate */ |
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| 149 | jimmy | 283 | if ( baudrate & 0x8000 ) |
| 284 | { |
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| 285 | UART0_STATUS = (1<<U2X0); //Enable 2x speed |
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| 286 | baudrate &= ~0x8000; |
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| 287 | } |
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| 60 | jimmy | 288 | UBRR0H = (unsigned char)(baudrate>>8); |
| 289 | UBRR0L = (unsigned char) baudrate; |
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| 290 | |||
| 291 | /* Enable USART receiver and transmitter and receive complete interrupt */ |
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| 292 | UART0_CONTROL = _BV(RXCIE0)|(1<<RXEN0)|(1<<TXEN0); |
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| 293 | |||
| 294 | /* Set frame format: asynchronous, 8data, no parity, 1stop bit */ |
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| 295 | #ifdef URSEL0 |
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| 296 | UCSR0C = (1<<URSEL0)|(3<<UCSZ00); |
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| 297 | #else |
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| 298 | UCSR0C = (3<<UCSZ00); |
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| 299 | #endif |
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| 300 | |||
| 301 | #elif defined ( ATMEGA_UART ) |
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| 302 | /* set baud rate */ |
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| 149 | jimmy | 303 | if ( baudrate & 0x8000 ) |
| 304 | { |
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| 305 | UART0_STATUS = (1<<U2X); //Enable 2x speed |
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| 306 | baudrate &= ~0x8000; |
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| 307 | } |
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| 60 | jimmy | 308 | UBRRHI = (unsigned char)(baudrate>>8); |
| 309 | UBRR = (unsigned char) baudrate; |
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| 310 | |||
| 311 | /* Enable UART receiver and transmitter and receive complete interrupt */ |
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| 312 | UART0_CONTROL = _BV(RXCIE)|(1<<RXEN)|(1<<TXEN); |
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| 313 | |||
| 314 | #endif |
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| 315 | |||
| 316 | }/* uart_init */ |
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| 317 | |||
| 318 | |||
| 319 | /************************************************************************* |
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| 320 | Function: uart_getc() |
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| 321 | Purpose: return byte from ringbuffer |
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| 322 | Returns: lower byte: received byte from ringbuffer |
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| 323 | higher byte: last receive error |
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| 324 | **************************************************************************/ |
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| 325 | unsigned int uart_getc(void) |
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| 326 | { |
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| 327 | unsigned char tmptail; |
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| 328 | unsigned char data; |
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| 329 | |||
| 330 | |||
| 331 | if ( UART_RxHead == UART_RxTail ) { |
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| 332 | return UART_NO_DATA; /* no data available */ |
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| 333 | } |
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| 334 | |||
| 335 | /* calculate /store buffer index */ |
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| 336 | tmptail = (UART_RxTail + 1) & UART_RX_BUFFER_MASK; |
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| 337 | UART_RxTail = tmptail; |
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| 338 | |||
| 339 | /* get data from receive buffer */ |
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| 340 | data = UART_RxBuf[tmptail]; |
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| 341 | |||
| 342 | return (UART_LastRxError << 8) + data; |
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| 343 | |||
| 344 | }/* uart_getc */ |
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| 345 | |||
| 346 | |||
| 347 | /************************************************************************* |
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| 348 | Function: uart_putc() |
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| 349 | Purpose: write byte to ringbuffer for transmitting via UART |
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| 350 | Input: byte to be transmitted |
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| 351 | Returns: none |
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| 352 | **************************************************************************/ |
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| 353 | void uart_putc(unsigned char data) |
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| 354 | { |
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| 355 | unsigned char tmphead; |
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| 356 | |||
| 357 | |||
| 358 | tmphead = (UART_TxHead + 1) & UART_TX_BUFFER_MASK; |
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| 359 | |||
| 360 | while ( tmphead == UART_TxTail ){ |
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| 361 | ;/* wait for free space in buffer */ |
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| 362 | } |
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| 363 | |||
| 364 | UART_TxBuf[tmphead] = data; |
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| 365 | UART_TxHead = tmphead; |
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| 366 | |||
| 367 | /* enable UDRE interrupt */ |
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| 368 | UART0_CONTROL |= _BV(UART0_UDRIE); |
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| 369 | |||
| 370 | }/* uart_putc */ |
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| 371 | |||
| 372 | |||
| 373 | /************************************************************************* |
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| 374 | Function: uart_puts() |
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| 375 | Purpose: transmit string to UART |
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| 376 | Input: string to be transmitted |
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| 377 | Returns: none |
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| 378 | **************************************************************************/ |
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| 379 | void uart_puts(const char *s ) |
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| 380 | { |
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| 381 | while (*s) |
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| 382 | uart_putc(*s++); |
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| 383 | |||
| 384 | }/* uart_puts */ |
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| 385 | |||
| 386 | |||
| 387 | /************************************************************************* |
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| 388 | Function: uart_puts_p() |
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| 389 | Purpose: transmit string from program memory to UART |
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| 390 | Input: program memory string to be transmitted |
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| 391 | Returns: none |
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| 392 | **************************************************************************/ |
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| 393 | void uart_puts_p(const char *progmem_s ) |
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| 394 | { |
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| 395 | register char c; |
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| 396 | |||
| 397 | while ( (c = pgm_read_byte(progmem_s++)) ) |
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| 398 | uart_putc(c); |
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| 399 | |||
| 400 | }/* uart_puts_p */ |
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| 401 | |||
| 149 | jimmy | 402 | |
| 403 | /* |
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| 404 | * these functions are only for ATmegas with two USART |
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| 405 | */ |
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| 406 | #if defined( ATMEGA_USART1 ) |
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| 407 | |||
| 408 | SIGNAL(UART1_RECEIVE_INTERRUPT) |
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| 60 | jimmy | 409 | /************************************************************************* |
| 149 | jimmy | 410 | Function: UART1 Receive Complete interrupt |
| 411 | Purpose: called when the UART1 has received a character |
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| 60 | jimmy | 412 | **************************************************************************/ |
| 413 | { |
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| 149 | jimmy | 414 | unsigned char tmphead; |
| 415 | unsigned char data; |
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| 416 | unsigned char usr; |
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| 417 | unsigned char lastRxError; |
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| 418 | |||
| 419 | |||
| 420 | /* read UART status register and UART data register */ |
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| 421 | usr = UART1_STATUS; |
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| 422 | data = UART1_DATA; |
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| 60 | jimmy | 423 | |
| 149 | jimmy | 424 | /* */ |
| 425 | lastRxError = (usr & (_BV(FE1)|_BV(DOR1)) ); |
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| 426 | |||
| 427 | /* calculate buffer index */ |
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| 428 | tmphead = ( UART1_RxHead + 1) & UART_RX_BUFFER_MASK; |
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| 429 | |||
| 430 | if ( tmphead == UART1_RxTail ) { |
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| 431 | /* error: receive buffer overflow */ |
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| 432 | lastRxError = UART_BUFFER_OVERFLOW >> 8; |
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| 433 | }else{ |
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| 434 | /* store new index */ |
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| 435 | UART1_RxHead = tmphead; |
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| 436 | /* store received data in buffer */ |
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| 437 | UART1_RxBuf[tmphead] = data; |
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| 438 | } |
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| 439 | UART1_LastRxError = lastRxError; |
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| 440 | } |
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| 60 | jimmy | 441 | |
| 442 | |||
| 149 | jimmy | 443 | SIGNAL(UART1_TRANSMIT_INTERRUPT) |
| 60 | jimmy | 444 | /************************************************************************* |
| 149 | jimmy | 445 | Function: UART1 Data Register Empty interrupt |
| 446 | Purpose: called when the UART1 is ready to transmit the next byte |
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| 60 | jimmy | 447 | **************************************************************************/ |
| 448 | { |
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| 149 | jimmy | 449 | unsigned char tmptail; |
| 60 | jimmy | 450 | |
| 149 | jimmy | 451 | |
| 452 | if ( UART1_TxHead != UART1_TxTail) { |
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| 453 | /* calculate and store new buffer index */ |
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| 454 | tmptail = (UART1_TxTail + 1) & UART_TX_BUFFER_MASK; |
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| 455 | UART1_TxTail = tmptail; |
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| 456 | /* get one byte from buffer and write it to UART */ |
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| 457 | UART1_DATA = UART1_TxBuf[tmptail]; /* start transmission */ |
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| 458 | }else{ |
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| 459 | /* tx buffer empty, disable UDRE interrupt */ |
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| 460 | UART1_CONTROL &= ~_BV(UART1_UDRIE); |
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| 461 | } |
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| 462 | } |
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| 463 | |||
| 464 | |||
| 60 | jimmy | 465 | /************************************************************************* |
| 149 | jimmy | 466 | Function: uart1_init() |
| 467 | Purpose: initialize UART1 and set baudrate |
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| 468 | Input: baudrate using macro UART_BAUD_SELECT() |
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| 60 | jimmy | 469 | Returns: none |
| 470 | **************************************************************************/ |
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| 149 | jimmy | 471 | void uart1_init(unsigned int baudrate) |
| 60 | jimmy | 472 | { |
| 149 | jimmy | 473 | UART1_TxHead = 0; |
| 474 | UART1_TxTail = 0; |
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| 475 | UART1_RxHead = 0; |
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| 476 | UART1_RxTail = 0; |
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| 477 | |||
| 60 | jimmy | 478 | |
| 149 | jimmy | 479 | /* Set baud rate */ |
| 480 | if ( baudrate & 0x8000 ) |
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| 481 | { |
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| 482 | UART1_STATUS = (1<<U2X1); //Enable 2x speed |
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| 483 | baudrate &= ~0x8000; |
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| 484 | } |
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| 485 | UBRR1H = (unsigned char)(baudrate>>8); |
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| 486 | UBRR1L = (unsigned char) baudrate; |
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| 487 | |||
| 488 | /* Enable USART receiver and transmitter and receive complete interrupt */ |
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| 489 | UART1_CONTROL = _BV(RXCIE1)|(1<<RXEN1)|(1<<TXEN1); |
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| 490 | |||
| 491 | /* Set frame format: asynchronous, 8data, no parity, 1stop bit */ |
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| 492 | #ifdef URSEL1 |
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| 493 | UCSR1C = (1<<URSEL1)|(3<<UCSZ10); |
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| 494 | #else |
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| 495 | UCSR1C = (3<<UCSZ10); |
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| 496 | #endif |
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| 497 | }/* uart_init */ |
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| 498 | |||
| 499 | |||
| 60 | jimmy | 500 | /************************************************************************* |
| 149 | jimmy | 501 | Function: uart1_getc() |
| 502 | Purpose: return byte from ringbuffer |
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| 503 | Returns: lower byte: received byte from ringbuffer |
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| 504 | higher byte: last receive error |
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| 505 | **************************************************************************/ |
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| 506 | unsigned int uart1_getc(void) |
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| 507 | { |
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| 508 | unsigned char tmptail; |
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| 509 | unsigned char data; |
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| 510 | |||
| 511 | |||
| 512 | if ( UART1_RxHead == UART1_RxTail ) { |
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| 513 | return UART_NO_DATA; /* no data available */ |
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| 514 | } |
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| 515 | |||
| 516 | /* calculate /store buffer index */ |
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| 517 | tmptail = (UART1_RxTail + 1) & UART_RX_BUFFER_MASK; |
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| 518 | UART1_RxTail = tmptail; |
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| 519 | |||
| 520 | /* get data from receive buffer */ |
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| 521 | data = UART1_RxBuf[tmptail]; |
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| 522 | |||
| 523 | return (UART1_LastRxError << 8) + data; |
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| 524 | |||
| 525 | }/* uart1_getc */ |
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| 526 | |||
| 527 | |||
| 528 | /************************************************************************* |
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| 529 | Function: uart1_putc() |
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| 530 | Purpose: write byte to ringbuffer for transmitting via UART |
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| 531 | Input: byte to be transmitted |
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| 532 | Returns: none |
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| 533 | **************************************************************************/ |
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| 534 | void uart1_putc(unsigned char data) |
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| 535 | { |
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| 536 | unsigned char tmphead; |
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| 537 | |||
| 538 | |||
| 539 | tmphead = (UART1_TxHead + 1) & UART_TX_BUFFER_MASK; |
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| 540 | |||
| 541 | while ( tmphead == UART1_TxTail ){ |
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| 542 | ;/* wait for free space in buffer */ |
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| 543 | } |
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| 544 | |||
| 545 | UART1_TxBuf[tmphead] = data; |
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| 546 | UART1_TxHead = tmphead; |
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| 547 | |||
| 548 | /* enable UDRE interrupt */ |
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| 549 | UART1_CONTROL |= _BV(UART1_UDRIE); |
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| 550 | |||
| 551 | }/* uart1_putc */ |
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| 552 | |||
| 553 | |||
| 554 | /************************************************************************* |
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| 555 | Function: uart1_puts() |
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| 556 | Purpose: transmit string to UART1 |
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| 557 | Input: string to be transmitted |
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| 558 | Returns: none |
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| 559 | **************************************************************************/ |
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| 560 | void uart1_puts(const char *s ) |
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| 561 | { |
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| 562 | while (*s) |
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| 563 | uart1_putc(*s++); |
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| 564 | |||
| 565 | }/* uart1_puts */ |
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| 566 | |||
| 567 | |||
| 568 | /************************************************************************* |
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| 569 | Function: uart1_puts_p() |
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| 570 | Purpose: transmit string from program memory to UART1 |
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| 571 | Input: program memory string to be transmitted |
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| 60 | jimmy | 572 | Returns: none |
| 573 | **************************************************************************/ |
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| 149 | jimmy | 574 | void uart1_puts_p(const char *progmem_s ) |
| 60 | jimmy | 575 | { |
| 149 | jimmy | 576 | register char c; |
| 60 | jimmy | 577 | |
| 149 | jimmy | 578 | while ( (c = pgm_read_byte(progmem_s++)) ) |
| 579 | uart1_putc(c); |
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| 580 | |||
| 581 | }/* uart1_puts_p */ |
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| 582 | |||
| 583 | |||
| 60 | jimmy | 584 | #endif |