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| Rev | Author | Line No. | Line |
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| 1774 | arune | 1 | |
| 2 | #include "act_DotMatrix.h" |
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| 3 | |||
| 4 | #ifdef act_DotMatrix_USEEEPROM |
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| 5 | #include "act_DotMatrix_eeprom.h" |
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| 6 | struct eeprom_act_DotMatrix EEMEM eeprom_act_DotMatrix = |
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| 7 | { |
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| 8 | { |
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| 9 | /*TODO: Define initialization values on the EEPROM variables here, |
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| 10 | this will generate a *.eep file that can be used to store this values to the node, |
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| 11 | can in future be done with a EEPROM module and the make-scrips. |
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| 12 | Write the values in the exact same order as the struct is defined in the *.h file. |
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| 13 | */ |
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| 14 | 0xAB, // x |
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| 15 | 0x1234 // y |
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| 16 | 0x12345678 // z |
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| 17 | }, |
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| 18 | |||
| 19 | }; |
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| 20 | #endif |
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| 21 | |||
| 22 | uint8_t act_DotMatrix_framebuf[8][4]; |
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| 23 | uint8_t act_DotMatrix_row_counter=0; |
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| 24 | uint16_t act_DotMatrix_brightness=0; |
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| 25 | |||
| 26 | /* Write a byte on SPI */ |
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| 27 | void act_DotMatrix_SPIWrite(uint8_t data) { |
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| 28 | uint8_t dummy = 0; |
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| 29 | /* Wait for empty transmit buffer */ |
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| 30 | while ( !( UCSR0A & (1<<UDRE0)) ); |
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| 31 | // write data |
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| 32 | dummy = UDR0; |
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| 33 | UDR0 = data; |
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| 34 | waitspi(); |
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| 35 | } |
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| 36 | |||
| 37 | /* Timer callback run periodically to manage rows. |
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| 38 | For each time callback is run, the next row is enabled and the last disabled |
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| 39 | */ |
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| 40 | void act_DotMatrix_timer_callback(uint8_t timer) |
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| 41 | { |
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| 42 | /* Increase row counter */ |
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| 43 | if (act_DotMatrix_row_counter++ == 8) {act_DotMatrix_row_counter = 0;} |
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| 44 | |||
| 45 | /* Disable all rows */ |
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| 46 | gpio_clr_pin(act_DotMatrix_ROW_IO1); |
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| 47 | gpio_clr_pin(act_DotMatrix_ROW_IO2); |
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| 48 | gpio_clr_pin(act_DotMatrix_ROW_IO3); |
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| 49 | gpio_clr_pin(act_DotMatrix_ROW_IO4); |
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| 50 | gpio_clr_pin(act_DotMatrix_ROW_IO5); |
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| 51 | gpio_clr_pin(act_DotMatrix_ROW_IO6); |
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| 52 | gpio_clr_pin(act_DotMatrix_ROW_IO7); |
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| 53 | gpio_clr_pin(act_DotMatrix_ROW_IO8); |
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| 54 | |||
| 55 | /* Write one column of frame buffer to shift registers */ |
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| 1776 | arune | 56 | act_DotMatrix_SPIWrite(act_DotMatrix_framebuf[7-act_DotMatrix_row_counter][3]); |
| 57 | act_DotMatrix_SPIWrite(act_DotMatrix_framebuf[7-act_DotMatrix_row_counter][2]); |
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| 58 | act_DotMatrix_SPIWrite(act_DotMatrix_framebuf[7-act_DotMatrix_row_counter][1]); |
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| 59 | act_DotMatrix_SPIWrite(act_DotMatrix_framebuf[7-act_DotMatrix_row_counter][0]); |
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| 1774 | arune | 60 | /* Add more here to support 8-module panels */ |
| 61 | |||
| 62 | /* Toggle shift register latch */ |
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| 63 | gpio_clr_pin(act_DotMatrix_LATCHCLOCK_IO); |
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| 64 | gpio_set_pin(act_DotMatrix_LATCHCLOCK_IO); |
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| 65 | |||
| 66 | /* Enable one row */ |
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| 67 | switch (act_DotMatrix_row_counter) |
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| 68 | { |
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| 69 | case 0: |
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| 70 | gpio_set_pin(act_DotMatrix_ROW_IO1); |
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| 71 | break; |
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| 72 | case 1: |
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| 73 | gpio_set_pin(act_DotMatrix_ROW_IO2); |
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| 74 | break; |
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| 75 | case 2: |
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| 76 | gpio_set_pin(act_DotMatrix_ROW_IO3); |
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| 77 | break; |
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| 78 | case 3: |
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| 79 | gpio_set_pin(act_DotMatrix_ROW_IO4); |
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| 80 | break; |
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| 81 | case 4: |
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| 82 | gpio_set_pin(act_DotMatrix_ROW_IO5); |
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| 83 | break; |
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| 84 | case 5: |
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| 85 | gpio_set_pin(act_DotMatrix_ROW_IO6); |
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| 86 | break; |
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| 87 | case 6: |
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| 88 | gpio_set_pin(act_DotMatrix_ROW_IO7); |
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| 89 | break; |
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| 90 | case 7: |
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| 91 | gpio_set_pin(act_DotMatrix_ROW_IO8); |
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| 92 | break; |
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| 93 | |||
| 94 | default: |
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| 95 | break; |
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| 96 | } |
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| 97 | } |
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| 98 | |||
| 99 | void act_DotMatrix_Init(void) |
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| 100 | { |
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| 101 | #ifdef act_DotMatrix_USEEEPROM |
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| 102 | if (EEDATA_OK) |
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| 103 | { |
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| 104 | ///TODO: Use stored data to set initial values for the module |
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| 105 | blablaX = eeprom_read_byte(EEDATA.x); |
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| 106 | blablaY = eeprom_read_word(EEDATA16.y); |
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| 107 | blablaZ = eeprom_read_dword(EEDATA32.y); |
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| 108 | } else |
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| 109 | { //The CRC of the EEPROM is not correct, store default values and update CRC |
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| 110 | eeprom_write_byte_crc(EEDATA.x, 0xAB, WITHOUT_CRC); |
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| 111 | eeprom_write_word_crc(EEDATA16.y, 0x1234, WITHOUT_CRC); |
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| 112 | eeprom_write_dword_crc(EEDATA32.y, 0x12345678, WITHOUT_CRC); |
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| 113 | EEDATA_UPDATE_CRC; |
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| 114 | } |
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| 115 | #endif |
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| 116 | |||
| 117 | /* Set up row driver IO as low output */ |
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| 118 | gpio_clr_pin(act_DotMatrix_ROW_IO1); |
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| 119 | gpio_set_out(act_DotMatrix_ROW_IO1); |
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| 120 | gpio_clr_pin(act_DotMatrix_ROW_IO2); |
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| 121 | gpio_set_out(act_DotMatrix_ROW_IO2); |
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| 122 | gpio_clr_pin(act_DotMatrix_ROW_IO3); |
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| 123 | gpio_set_out(act_DotMatrix_ROW_IO3); |
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| 124 | gpio_clr_pin(act_DotMatrix_ROW_IO4); |
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| 125 | gpio_set_out(act_DotMatrix_ROW_IO4); |
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| 126 | gpio_clr_pin(act_DotMatrix_ROW_IO5); |
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| 127 | gpio_set_out(act_DotMatrix_ROW_IO5); |
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| 128 | gpio_clr_pin(act_DotMatrix_ROW_IO6); |
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| 129 | gpio_set_out(act_DotMatrix_ROW_IO6); |
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| 130 | gpio_clr_pin(act_DotMatrix_ROW_IO7); |
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| 131 | gpio_set_out(act_DotMatrix_ROW_IO7); |
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| 132 | gpio_clr_pin(act_DotMatrix_ROW_IO8); |
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| 133 | gpio_set_out(act_DotMatrix_ROW_IO8); |
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| 134 | |||
| 135 | /* Set up PWM controlling brightness */ |
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| 136 | TCCR0A |= (1<<COM0B1)|(1<<WGM01)|(1<<WGM00); |
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| 137 | TCCR0B |= (1<<CS00); |
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| 138 | OCR0B = 0xff-act_DotMatrix_INITIAL_BRIGHTNESS; |
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| 139 | DDRD |= (1<<PD5); |
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| 140 | |||
| 141 | /* Set up output latch clock */ |
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| 142 | gpio_clr_pin(act_DotMatrix_LATCHCLOCK_IO); |
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| 143 | gpio_set_out(act_DotMatrix_LATCHCLOCK_IO); |
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| 144 | |||
| 145 | /* Initialize USART in SPI-mode */ |
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| 146 | UBRR0 = 0; |
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| 147 | USART_SPI_XCK_DDR |= (1<<USART_SPI_XCK); // xck (sck) output |
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| 148 | UCSR0C = (1<<UMSEL01)|(1<<UMSEL00)|(0<<UCPHA0)|(0<<UCPOL0); |
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| 149 | UCSR0B = (1<<RXEN0)|(1<<TXEN0); |
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| 150 | UBRR0 = 0; |
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| 151 | |||
| 152 | /* Start timer for row management */ |
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| 153 | Timer_SetTimeout(act_DotMatrix_ROW_TIMER, act_DotMatrix_ROW_TIME, TimerTypeFreeRunning, &act_DotMatrix_timer_callback); |
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| 154 | |||
| 155 | /* Clear buffer memory */ |
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| 156 | for (uint8_t i=0; i<8; i++) |
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| 157 | { |
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| 158 | for (uint8_t j=0; j<4; j++) |
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| 159 | { |
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| 160 | act_DotMatrix_framebuf[i][j] = act_DotMatrix_INITIAL_ROW; |
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| 161 | } |
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| 162 | } |
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| 163 | } |
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| 164 | |||
| 165 | void act_DotMatrix_Process(void) |
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| 166 | { |
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| 167 | } |
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| 168 | |||
| 169 | void act_DotMatrix_HandleMessage(StdCan_Msg_t *rxMsg) |
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| 170 | { |
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| 171 | if ( StdCan_Ret_class(rxMsg->Header) == CAN_MODULE_CLASS_ACT && |
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| 1775 | arune | 172 | StdCan_Ret_direction(rxMsg->Header) == DIRECTIONFLAG_TO_OWNER && |
| 1774 | arune | 173 | rxMsg->Header.ModuleType == CAN_MODULE_TYPE_ACT_DOTMATRIX && |
| 174 | rxMsg->Header.ModuleId == act_DotMatrix_ID) |
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| 175 | { |
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| 176 | switch (rxMsg->Header.Command) |
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| 177 | { |
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| 178 | /* If brightness should be adjusted */ |
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| 179 | case CAN_MODULE_CMD_PHYSICAL_PWM: |
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| 180 | if (rxMsg->Length == 3) { |
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| 181 | act_DotMatrix_brightness = (rxMsg->Data[1]<<8)+(rxMsg->Data[2]); |
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| 182 | |||
| 1775 | arune | 183 | if (OCR0B != 0xff-((uint16_t)(act_DotMatrix_brightness*act_DotMatrix_PWM_FACT)>>8)) { |
| 1774 | arune | 184 | cli(); |
| 1775 | arune | 185 | OCR0B=0xff-((uint16_t)(act_DotMatrix_brightness*act_DotMatrix_PWM_FACT)>>8); |
| 1774 | arune | 186 | sei(); |
| 187 | } |
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| 188 | } |
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| 189 | break; |
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| 190 | /* If data to first module */ |
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| 191 | case CAN_MODULE_CMD_DOTMATRIX_IMAGEDATAMODULE1: |
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| 192 | for (uint8_t i=0; i<8; i++) |
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| 193 | { |
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| 194 | act_DotMatrix_framebuf[i][0] = rxMsg->Data[i]; |
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| 195 | } |
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| 196 | break; |
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| 197 | /* If data to second module */ |
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| 198 | case CAN_MODULE_CMD_DOTMATRIX_IMAGEDATAMODULE2: |
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| 199 | for (uint8_t i=0; i<8; i++) |
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| 200 | { |
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| 201 | act_DotMatrix_framebuf[i][1] = rxMsg->Data[i]; |
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| 202 | } |
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| 203 | break; |
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| 204 | /* If data to third module */ |
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| 205 | case CAN_MODULE_CMD_DOTMATRIX_IMAGEDATAMODULE3: |
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| 206 | for (uint8_t i=0; i<8; i++) |
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| 207 | { |
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| 208 | act_DotMatrix_framebuf[i][2] = rxMsg->Data[i]; |
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| 209 | } |
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| 210 | break; |
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| 211 | /* If data to fourth module */ |
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| 212 | case CAN_MODULE_CMD_DOTMATRIX_IMAGEDATAMODULE4: |
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| 213 | for (uint8_t i=0; i<8; i++) |
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| 214 | { |
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| 215 | act_DotMatrix_framebuf[i][3] = rxMsg->Data[i]; |
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| 216 | } |
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| 217 | break; |
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| 218 | } |
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| 219 | } |
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| 220 | } |
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| 221 | |||
| 222 | void act_DotMatrix_List(uint8_t ModuleSequenceNumber) |
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| 223 | { |
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| 224 | StdCan_Msg_t txMsg; |
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| 225 | |||
| 226 | StdCan_Set_class(txMsg.Header, CAN_MODULE_CLASS_ACT); |
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| 227 | StdCan_Set_direction(txMsg.Header, DIRECTIONFLAG_FROM_OWNER); |
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| 228 | txMsg.Header.ModuleType = CAN_MODULE_TYPE_ACT_DOTMATRIX; |
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| 229 | txMsg.Header.ModuleId = act_DotMatrix_ID; |
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| 230 | txMsg.Header.Command = CAN_MODULE_CMD_GLOBAL_LIST; |
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| 231 | txMsg.Length = 6; |
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| 232 | |||
| 233 | txMsg.Data[0] = NODE_HW_ID_BYTE0; |
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| 234 | txMsg.Data[1] = NODE_HW_ID_BYTE1; |
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| 235 | txMsg.Data[2] = NODE_HW_ID_BYTE2; |
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| 236 | txMsg.Data[3] = NODE_HW_ID_BYTE3; |
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| 237 | |||
| 238 | txMsg.Data[4] = NUMBER_OF_MODULES; |
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| 239 | txMsg.Data[5] = ModuleSequenceNumber; |
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| 240 | |||
| 241 | while (StdCan_Put(&txMsg) != StdCan_Ret_OK); |
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| 242 | } |