Rev 1757 | Rev 1975 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | SVN | RSS feed
| Rev 1757 | Rev 1758 | ||
|---|---|---|---|
| Line 6... | Line 6... | ||
| 6 | 6 | ||
| 7 | #sns_irTransceive_USEEEPROM=1 |
7 | #sns_irTransceive_USEEEPROM=1 |
| 8 | 8 | ||
| 9 | IR_RX_ENABLE=1 |
9 | IR_RX_ENABLE=1 |
| 10 | IR_TX_ENABLE=1 |
10 | IR_TX_ENABLE=1 |
| 11 |
|
11 | IR_TX_ACTIVE_LOW=1 |
| 12 | IR_RX_ACTIVE_LOW=1 |
12 | IR_RX_ACTIVE_LOW=1 |
| 13 | - | ||
| 14 | # Change only if you know that you have available RAM |
- | |
| 15 | # usage = MAX_NR_TIMES * 2 * Number of activated rx and tx channels |
- | |
| 16 | #MAX_NR_TIMES=81 |
- | |
| 17 | 13 | ||
| 18 | # chose port for modulation, however note that pwm is hard coded for OC0A |
14 | # chose port for modulation, however note that pwm is hard coded for OC0A |
| 19 | sns_irTransceive_MOD_PIN=GPIO_D6 |
15 | sns_irTransceive_MOD_PIN=GPIO_D6 |
| 20 | 16 | ||
| 21 | # comment the port if not used |
- | |
| 22 |
|
17 | sns_irTransceive_VCC_EN0_PIN=GPIO_D0 |
| 23 |
|
18 | sns_irTransceive_VCC_EN1_PIN=GPIO_D1 |
| 24 |
|
19 | sns_irTransceive_VCC_EN2_PIN=GPIO_D4 |
| 25 | 20 | ||
| 26 | # comment the port if channel is not used, always use in order! |
- | |
| 27 | sns_irTransceive_TX0_PIN=GPIO_D5 |
21 | sns_irTransceive_TX0_PIN=GPIO_D5 |
| 28 | sns_irTransceive_TX0_REPEATE_TIMER=<TIMER> |
22 | sns_irTransceive_TX0_REPEATE_TIMER=<TIMER> |
| 29 | 23 | ||
| 30 | sns_irTransceive_TX1_PIN=GPIO_B1 |
24 | sns_irTransceive_TX1_PIN=GPIO_B1 |
| 31 | sns_irTransceive_TX1_REPEATE_TIMER=<TIMER> |
25 | sns_irTransceive_TX1_REPEATE_TIMER=<TIMER> |
| 32 | 26 | ||
| 33 | sns_irTransceive_TX2_PIN=GPIO_B2 |
27 | sns_irTransceive_TX2_PIN=GPIO_B2 |
| 34 | sns_irTransceive_TX2_REPEATE_TIMER=<TIMER> |
28 | sns_irTransceive_TX2_REPEATE_TIMER=<TIMER> |
| 35 | 29 | ||
| 36 | 30 | ||
| 37 | # comment the port if channel is not used, always use in order! |
- | |
| 38 |
|
31 | sns_irTransceive_RX0_PIN=GPIO_C0 |
| 39 | sns_irTransceive_RX0_PCINT=<PCINT> |
32 | sns_irTransceive_RX0_PCINT=<PCINT> |
| 40 | sns_irTransceive_RX0_REPEATE_TIMER=<TIMER> |
33 | sns_irTransceive_RX0_REPEATE_TIMER=<TIMER> |
| 41 | sns_irTransceive_RX0_NOISE_CANCELER_TIME_US=100 |
- | |
| 42 | 34 | ||
| 43 |
|
35 | sns_irTransceive_RX1_PIN=GPIO_C1 |
| 44 | sns_irTransceive_RX1_PCINT=<PCINT> |
36 | sns_irTransceive_RX1_PCINT=<PCINT> |
| 45 | sns_irTransceive_RX1_REPEATE_TIMER=<TIMER> |
37 | sns_irTransceive_RX1_REPEATE_TIMER=<TIMER> |
| 46 | sns_irTransceive_RX1_NOISE_CANCELER_TIME_US=100 |
- | |
| 47 | 38 | ||
| 48 |
|
39 | sns_irTransceive_RX2_PIN=GPIO_C2 |
| 49 | sns_irTransceive_RX2_PCINT=<PCINT> |
40 | sns_irTransceive_RX2_PCINT=<PCINT> |
| 50 | sns_irTransceive_RX2_REPEATE_TIMER=<TIMER> |
41 | sns_irTransceive_RX2_REPEATE_TIMER=<TIMER> |
| 51 | sns_irTransceive_RX2_NOISE_CANCELER_TIME_US=100 |
- | |
| 52 | 42 | ||
| 53 | 43 | ||
| 54 | sns_irTransceive_TX0_PWRl=GPIO_B0 |
44 | sns_irTransceive_TX0_PWRl=GPIO_B0 |
| 55 | sns_irTransceive_TX0_PWRl_PCA95xx=0 |
45 | sns_irTransceive_TX0_PWRl_PCA95xx=0 |
| 56 | sns_irTransceive_TX0_PWRh=GPIO_B7 |
46 | sns_irTransceive_TX0_PWRh=GPIO_B7 |