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| Rev 1498 | Rev 1730 | ||
|---|---|---|---|
| Line 91... | Line 91... | ||
| 91 | } |
91 | } |
| 92 | } |
92 | } |
| 93 | 93 | ||
| 94 | void sns_irTransceive_Init(void) |
94 | void sns_irTransceive_Init(void) |
| 95 | { |
95 | { |
| - | 96 | /* Debug IO, PB7 */ |
|
| 96 | gpio_set_out(EXP_A); |
97 | gpio_set_out(EXP_A); |
| 97 | gpio_set_pin(EXP_A); |
98 | gpio_set_pin(EXP_A); |
| - | 99 | ||
| 98 | StdCan_Set_class(irTxMsg.Header, CAN_MODULE_CLASS_SNS); |
100 | StdCan_Set_class(irTxMsg.Header, CAN_MODULE_CLASS_SNS); |
| 99 | StdCan_Set_direction(irTxMsg.Header, DIRECTIONFLAG_FROM_OWNER); |
101 | StdCan_Set_direction(irTxMsg.Header, DIRECTIONFLAG_FROM_OWNER); |
| 100 | irTxMsg.Header.ModuleType = CAN_MODULE_TYPE_SNS_IRTRANSCEIVE; |
102 | irTxMsg.Header.ModuleType = CAN_MODULE_TYPE_SNS_IRTRANSCEIVE; |
| 101 | irTxMsg.Header.ModuleId = sns_irTransceive_ID; |
103 | irTxMsg.Header.ModuleId = sns_irTransceive_ID; |
| 102 | irTxMsg.Header.Command = CAN_MODULE_CMD_PHYSICAL_IR; |
104 | irTxMsg.Header.Command = CAN_MODULE_CMD_PHYSICAL_IR; |
| Line 137... | Line 139... | ||
| 137 | irTxChannel[1].timerNum=sns_irTransceive_TX1_REPEATE_TIMER; |
139 | irTxChannel[1].timerNum=sns_irTransceive_TX1_REPEATE_TIMER; |
| 138 | irTxChannel[2].timerNum=sns_irTransceive_TX2_REPEATE_TIMER; |
140 | irTxChannel[2].timerNum=sns_irTransceive_TX2_REPEATE_TIMER; |
| 139 | #endif |
141 | #endif |
| 140 | 142 | ||
| 141 | IrTransceiver_Init(); |
143 | IrTransceiver_Init(); |
| - | 144 | /* Configure all TX VCC pins as outputs and disable them */ |
|
| 142 | gpio_set_out(sns_irTransceive_VCC_EN0_PIN); |
145 | gpio_set_out(sns_irTransceive_VCC_EN0_PIN); |
| 143 | gpio_set_out(sns_irTransceive_VCC_EN1_PIN); |
146 | gpio_set_out(sns_irTransceive_VCC_EN1_PIN); |
| 144 | gpio_set_out(sns_irTransceive_VCC_EN2_PIN); |
147 | gpio_set_out(sns_irTransceive_VCC_EN2_PIN); |
| 145 | gpio_set_pin(sns_irTransceive_VCC_EN0_PIN); |
148 | gpio_set_pin(sns_irTransceive_VCC_EN0_PIN); |
| 146 | gpio_set_pin(sns_irTransceive_VCC_EN1_PIN); |
149 | gpio_set_pin(sns_irTransceive_VCC_EN1_PIN); |
| 147 | gpio_set_pin(sns_irTransceive_VCC_EN2_PIN); |
150 | gpio_set_pin(sns_irTransceive_VCC_EN2_PIN); |
| 148 | - | ||
| 149 | #if IR_RX_ENABLE==1 |
- | |
| 150 | irRxChannel[0].rxbuf = buf[0]; |
- | |
| 151 | IrTransceiver_InitRxChannel(0, irRxChannel[0].rxbuf, sns_irTransceive_RX_done_callback, sns_irTransceive_RX0_PCINT, sns_irTransceive_RX0_PIN); |
- | |
| 152 | #endif |
- | |
| 153 | 151 | ||
| 154 | #if IR_TX_ENABLE==1 |
152 | #if IR_TX_ENABLE==1 |
| 155 | gpio_set_out(sns_irTransceive_MOD_PIN); |
153 | gpio_set_out(sns_irTransceive_MOD_PIN); |
| 156 | gpio_set_out(sns_irTransceive_TX0_PIN); |
154 | gpio_set_out(sns_irTransceive_TX0_PIN); |
| 157 | gpio_set_out(sns_irTransceive_TX1_PIN); |
155 | gpio_set_out(sns_irTransceive_TX1_PIN); |
| 158 | gpio_set_out(sns_irTransceive_TX2_PIN); |
156 | gpio_set_out(sns_irTransceive_TX2_PIN); |
| 159 | #if IR_TX_ACTIVE_LOW==1 |
157 | #if IR_TX_ACTIVE_LOW==1 |
| 160 | gpio_set_pin(sns_irTransceive_TX0_PIN); |
158 | gpio_set_pin(sns_irTransceive_TX0_PIN); |
| 161 | gpio_set_pin(sns_irTransceive_TX1_PIN); |
159 | gpio_set_pin(sns_irTransceive_TX1_PIN); |
| 162 | gpio_set_pin(sns_irTransceive_TX2_PIN); |
160 | gpio_set_pin(sns_irTransceive_TX2_PIN); |
| 163 | #endif |
161 | #endif |
| 164 | - | ||
| 165 | irTxChannel[0].txbuf = buf[0]; |
- | |
| 166 | IrTransceiver_InitTxChannel(0, sns_irTransceive_TX_done_callback, sns_irTransceive_TX0_PIN); |
- | |
| 167 | - | ||
| 168 | irTxChannel[1].txbuf = buf[1]; |
- | |
| 169 | IrTransceiver_InitTxChannel(1, sns_irTransceive_TX_done_callback, sns_irTransceive_TX1_PIN); |
- | |
| 170 | - | ||
| 171 | irTxChannel[2].txbuf = buf[2]; |
- | |
| 172 | IrTransceiver_InitTxChannel(2, sns_irTransceive_TX_done_callback, sns_irTransceive_TX2_PIN); |
- | |
| 173 | #endif |
162 | #endif |
| 174 | 163 | ||
| 175 | } |
164 | } |
| 176 | 165 | ||
| 177 | void sns_irTransceive_Process(void) |
166 | void sns_irTransceive_Process(void) |
| 178 | { |
167 | { |
| 179 | for (uint8_t channel=0; channel < IR_SUPPORTED_NUM_CHANNELS; channel++) |
168 | for (uint8_t channel=0; channel < IR_SUPPORTED_NUM_CHANNELS; channel++) |
| 180 | { |
169 | { |
| 181 | //gpio_toggle_pin(EXP_A); |
170 | //gpio_toggle_pin(EXP_A); /* Toggle debug output PB7 */ |
| 182 | 171 | ||
| 183 | #if IR_RX_ENABLE==1 |
172 | #if IR_RX_ENABLE==1 |
| 184 | switch (irRxChannel[channel].state) |
173 | switch (irRxChannel[channel].state) |
| 185 | { |
174 | { |
| 186 | case sns_irTransceive_STATE_IDLE: |
175 | case sns_irTransceive_STATE_IDLE: |
| Line 275... | Line 264... | ||
| 275 | case sns_irTransceive_STATE_IDLE: |
264 | case sns_irTransceive_STATE_IDLE: |
| 276 | /* transmission is started when a command is received on can */ |
265 | /* transmission is started when a command is received on can */ |
| 277 | break; |
266 | break; |
| 278 | 267 | ||
| 279 | case sns_irTransceive_STATE_START_TRANSMIT: |
268 | case sns_irTransceive_STATE_START_TRANSMIT: |
| 280 | // printf("1\n"); |
- | |
| 281 | if (expandProtocol(irTxChannel[channel].txbuf, &irTxChannel[channel].txlen, &irTxChannel[channel].proto) == IR_OK) |
269 | if (expandProtocol(irTxChannel[channel].txbuf, &irTxChannel[channel].txlen, &irTxChannel[channel].proto) == IR_OK) |
| 282 | { |
270 | { |
| 283 | IrTransceiver_Transmit(channel, irTxChannel[channel].txbuf, irTxChannel[channel].txlen); |
271 | IrTransceiver_Transmit(channel, irTxChannel[channel].txbuf, irTxChannel[channel].txlen); |
| 284 | irTxChannel[channel].state = sns_irTransceive_STATE_TRANSMITTING; |
272 | irTxChannel[channel].state = sns_irTransceive_STATE_TRANSMITTING; |
| 285 | // printf("2\n"); |
- | |
| 286 | } |
273 | } |
| 287 | else |
274 | else |
| 288 | { |
275 | { |
| 289 | irTxChannel[channel].state = sns_irTransceive_STATE_IDLE; |
276 | irTxChannel[channel].state = sns_irTransceive_STATE_IDLE; |
| 290 | } |
277 | } |
| Line 295... | Line 282... | ||
| 295 | { |
282 | { |
| 296 | cli(); |
283 | cli(); |
| 297 | irTxChannel[channel].sendComplete = FALSE; |
284 | irTxChannel[channel].sendComplete = FALSE; |
| 298 | sei(); |
285 | sei(); |
| 299 | irTxChannel[channel].state = sns_irTransceive_STATE_START_PAUSE; |
286 | irTxChannel[channel].state = sns_irTransceive_STATE_START_PAUSE; |
| 300 | // printf("3\n"); |
- | |
| 301 | } |
287 | } |
| 302 | break; |
288 | break; |
| 303 | 289 | ||
| 304 | case sns_irTransceive_STATE_START_PAUSE: |
290 | case sns_irTransceive_STATE_START_PAUSE: |
| 305 | if (irTxChannel[channel].repeatCount < irTxChannel[channel].proto.repeats) |
291 | if (irTxChannel[channel].repeatCount < irTxChannel[channel].proto.repeats) |
| Line 308... | Line 294... | ||
| 308 | } |
294 | } |
| 309 | 295 | ||
| 310 | Timer_SetTimeout(irTxChannel[channel].timerNum, irTxChannel[channel].proto.timeout, TimerTypeOneShot, 0); |
296 | Timer_SetTimeout(irTxChannel[channel].timerNum, irTxChannel[channel].proto.timeout, TimerTypeOneShot, 0); |
| 311 | 297 | ||
| 312 | if (irTxChannel[channel].proto.framecnt != 255) |
298 | if (irTxChannel[channel].proto.framecnt != 255) |
| 313 | { |
299 | { |
| 314 | irTxChannel[channel].proto.framecnt++; |
300 | irTxChannel[channel].proto.framecnt++; |
| 315 | } |
301 | } |
| 316 | 302 | ||
| 317 | irTxChannel[channel].state = sns_irTransceive_STATE_PAUSING; |
303 | irTxChannel[channel].state = sns_irTransceive_STATE_PAUSING; |
| 318 | break; |
304 | break; |
| 319 | 305 | ||
| 320 | case sns_irTransceive_STATE_PAUSING: |
306 | case sns_irTransceive_STATE_PAUSING: |
| 321 | if (Timer_Expired(irTxChannel[channel].timerNum)) |
307 | if (Timer_Expired(irTxChannel[channel].timerNum)) |
| 322 | { |
308 | { |
| 323 | irTxChannel[channel].state = sns_irTransceive_STATE_START_TRANSMIT; |
309 | irTxChannel[channel].state = sns_irTransceive_STATE_START_TRANSMIT; |
| 324 | // printf("4\n"); |
- | |
| 325 | } |
310 | } |
| 326 | 311 | ||
| 327 | /* transmission is stopped when such command is recevied on can */ |
312 | /* transmission is stopped when such command is recevied on can */ |
| 328 | if (irTxChannel[channel].stopSend == TRUE && irTxChannel[channel].repeatCount >= irTxChannel[channel].proto.repeats) |
313 | if (irTxChannel[channel].stopSend == TRUE && irTxChannel[channel].repeatCount >= irTxChannel[channel].proto.repeats) |
| 329 | { |
314 | { |
| 330 | //TODO maybe send message on can for status? to confirm stopped sending, ready for new command |
315 | //TODO maybe send message on can for status? to confirm stopped sending, ready for new command |
| 331 | irTxChannel[channel].state = sns_irTransceive_STATE_START_IDLE; |
316 | irTxChannel[channel].state = sns_irTransceive_STATE_START_IDLE; |
| 332 | // printf("5\n"); |
- | |
| 333 | } |
317 | } |
| 334 | break; |
318 | break; |
| 335 | 319 | ||
| 336 | case sns_irTransceive_STATE_START_IDLE: |
320 | case sns_irTransceive_STATE_START_IDLE: |
| 337 | irTxChannel[channel].stopSend = FALSE; |
321 | irTxChannel[channel].stopSend = FALSE; |
| 338 | irTxChannel[channel].repeatCount = 0; |
322 | irTxChannel[channel].repeatCount = 0; |
| 339 | irTxChannel[channel].proto.framecnt = 0; |
323 | irTxChannel[channel].proto.framecnt = 0; |
| 340 | 324 | ||
| 341 | irTxChannel[channel].state = sns_irTransceive_STATE_IDLE; |
325 | irTxChannel[channel].state = sns_irTransceive_STATE_IDLE; |
| 342 | // printf("6\n"); |
- | |
| 343 | break; |
326 | break; |
| 344 | } |
327 | } |
| 345 | #endif |
328 | #endif |
| 346 | 329 | ||
| 347 | } |
330 | } |
| 348 | } |
331 | } |
| 349 | 332 | ||
| - | 333 | /* Handle incoming CAN data */ |
|
| 350 | void sns_irTransceive_HandleMessage(StdCan_Msg_t *rxMsg) |
334 | void sns_irTransceive_HandleMessage(StdCan_Msg_t *rxMsg) |
| 351 | { |
335 | { |
| 352 | if ( StdCan_Ret_class(rxMsg->Header) == CAN_MODULE_CLASS_SNS && |
336 | if ( StdCan_Ret_class(rxMsg->Header) == CAN_MODULE_CLASS_SNS && |
| 353 | StdCan_Ret_direction(rxMsg->Header) == DIRECTIONFLAG_TO_OWNER && |
337 | StdCan_Ret_direction(rxMsg->Header) == DIRECTIONFLAG_TO_OWNER && |
| 354 | rxMsg->Header.ModuleType == CAN_MODULE_TYPE_SNS_IRTRANSCEIVE && |
338 | rxMsg->Header.ModuleType == CAN_MODULE_TYPE_SNS_IRTRANSCEIVE && |
| Line 380... | Line 364... | ||
| 380 | { |
364 | { |
| 381 | if (irTxChannel[channel].state != sns_irTransceive_STATE_IDLE) |
365 | if (irTxChannel[channel].state != sns_irTransceive_STATE_IDLE) |
| 382 | { |
366 | { |
| 383 | irTxChannel[channel].stopSend = TRUE; |
367 | irTxChannel[channel].stopSend = TRUE; |
| 384 | } |
368 | } |
| - | 369 | } |
|
| - | 370 | break; |
|
| - | 371 | ||
| - | 372 | case CAN_MODULE_CMD_IRTRANSCEIVE_IRCONFIG: |
|
| - | 373 | channel = rxMsg->Data[0]>>4; |
|
| - | 374 | uint8_t config = rxMsg->Data[0] & 0x0f; |
|
| - | 375 | uint8_t power = rxMsg->Data[1]>>6; |
|
| - | 376 | ||
| - | 377 | if (channel < IR_SUPPORTED_NUM_CHANNELS && config <= CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_RECEIVE && power < 4) |
|
| - | 378 | { |
|
| - | 379 | #if IR_RX_ENABLE==1 |
|
| - | 380 | if (config == CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_RECEIVE) |
|
| - | 381 | { |
|
| - | 382 | irRxChannel[channel].rxbuf = buf[channel]; |
|
| - | 383 | switch (channel) |
|
| - | 384 | { |
|
| - | 385 | case 0: |
|
| - | 386 | gpio_clr_pin(sns_irTransceive_VCC_EN0_PIN); |
|
| - | 387 | IrTransceiver_InitRxChannel(channel, irRxChannel[channel].rxbuf, sns_irTransceive_RX_done_callback, sns_irTransceive_RX0_PCINT, sns_irTransceive_RX0_PIN); |
|
| - | 388 | break; |
|
| - | 389 | case 1: |
|
| - | 390 | gpio_clr_pin(sns_irTransceive_VCC_EN1_PIN); |
|
| - | 391 | IrTransceiver_InitRxChannel(channel, irRxChannel[channel].rxbuf, sns_irTransceive_RX_done_callback, sns_irTransceive_RX1_PCINT, sns_irTransceive_RX1_PIN); |
|
| - | 392 | break; |
|
| - | 393 | case 2: |
|
| - | 394 | gpio_clr_pin(sns_irTransceive_VCC_EN2_PIN); |
|
| - | 395 | IrTransceiver_InitRxChannel(channel, irRxChannel[channel].rxbuf, sns_irTransceive_RX_done_callback, sns_irTransceive_RX2_PCINT, sns_irTransceive_RX2_PIN); |
|
| - | 396 | break; |
|
| - | 397 | } |
|
| - | 398 | } |
|
| - | 399 | #endif |
|
| - | 400 | ||
| - | 401 | #if IR_TX_ENABLE==1 |
|
| - | 402 | if (config == CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_TRANSMIT) |
|
| - | 403 | { |
|
| - | 404 | irTxChannel[channel].txbuf = buf[channel]; |
|
| - | 405 | switch (channel) |
|
| - | 406 | { |
|
| - | 407 | case 0: |
|
| - | 408 | #if IR_RX_ENABLE==1 |
|
| - | 409 | gpio_set_pin(sns_irTransceive_VCC_EN0_PIN); |
|
| - | 410 | IrTransceiver_DeInitRxChannel(channel, sns_irTransceive_RX0_PCINT, sns_irTransceive_RX0_PIN); |
|
| - | 411 | #endif |
|
| - | 412 | IrTransceiver_InitTxChannel(channel, sns_irTransceive_TX_done_callback, sns_irTransceive_TX0_PIN); |
|
| - | 413 | break; |
|
| - | 414 | case 1: |
|
| - | 415 | #if IR_RX_ENABLE==1 |
|
| - | 416 | gpio_set_pin(sns_irTransceive_VCC_EN1_PIN); |
|
| - | 417 | IrTransceiver_DeInitRxChannel(channel, sns_irTransceive_RX1_PCINT, sns_irTransceive_RX1_PIN); |
|
| - | 418 | #endif |
|
| - | 419 | IrTransceiver_InitTxChannel(channel, sns_irTransceive_TX_done_callback, sns_irTransceive_TX1_PIN); |
|
| - | 420 | break; |
|
| - | 421 | case 2: |
|
| - | 422 | #if IR_RX_ENABLE==1 |
|
| - | 423 | gpio_set_pin(sns_irTransceive_VCC_EN2_PIN); |
|
| - | 424 | IrTransceiver_DeInitRxChannel(channel, sns_irTransceive_RX2_PCINT, sns_irTransceive_RX2_PIN); |
|
| - | 425 | #endif |
|
| - | 426 | IrTransceiver_InitTxChannel(channel, sns_irTransceive_TX_done_callback, sns_irTransceive_TX2_PIN); |
|
| - | 427 | break; |
|
| - | 428 | } |
|
| - | 429 | } |
|
| - | 430 | #endif |
|
| 385 | } |
431 | } |
| 386 | break; |
432 | break; |
| 387 | } |
433 | } |
| 388 | } |
434 | } |
| 389 | } |
435 | } |