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#endif
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#endif
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#ifndef sns_irTransceive_PRONTO_SUPPORT
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#ifndef sns_irTransceive_PRONTO_SUPPORT
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#define sns_irTransceive_PRONTO_SUPPORT 0
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#define sns_irTransceive_PRONTO_SUPPORT 0
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#endif
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#endif
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 - 
 
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#if sns_irTransceive_PRONTO_SUPPORT==1
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#if sns_irTransceive_PRONTO_SUPPORT==1
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#define sns_irTransceive_BaseFrq (4145146ULL)
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#define sns_irTransceive_BaseFrq (4145146ULL)
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void send_pronto(uint16_t *buffer, uint8_t len, uint8_t channel, uint8_t modfreq) {
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void send_pronto(uint16_t *buffer, uint8_t len, uint8_t channel, uint8_t modfreq) {
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    StdCan_Msg_t msg;
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    StdCan_Msg_t msg;
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    else
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    else
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    {  
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    {  
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    /* The CRC of the EEPROM is not correct, store default values and update CRC */
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    /* The CRC of the EEPROM is not correct, store default values and update CRC */
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        eeprom_write_byte_crc(EEDATA.ch0_config, CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_AUTO, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch0_config, CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_AUTO, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch0_txpower, 0, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch0_txpower, 0, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch0_modfreq, BaseFrq/38000, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch0_modfreq, sns_irTransceive_BaseFrq/38000, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch1_config, CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_AUTO, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch1_config, CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_AUTO, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch1_txpower, 0, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch1_txpower, 0, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch1_modfreq, BaseFrq/38000, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch1_modfreq, sns_irTransceive_BaseFrq/38000, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch2_config, CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_AUTO, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch2_config, CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_AUTO, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch2_txpower, 0, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch2_txpower, 0, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch2_modfreq, BaseFrq/38000, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch2_modfreq, sns_irTransceive_BaseFrq/38000, WITHOUT_CRC);
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        EEDATA_UPDATE_CRC;
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        EEDATA_UPDATE_CRC;
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    }
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    }
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#endif 
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#endif 
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}
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}
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