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Line 536... Line 536...
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#ifdef sns_irTransceive_USEEEPROM
 537 
#ifdef sns_irTransceive_USEEEPROM
538 
    if (EEDATA_OK)
 538 
    if (EEDATA_OK)
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    {
 539 
    {
540 
      /* Use stored data to set initial values for the module */
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      /* Use stored data to set initial values for the module */
541 
        sns_irTransceive_setConfig(0, eeprom_read_byte(EEDATA.ch0_config), eeprom_read_byte(EEDATA.ch0_txpower), eeprom_read_word(EEDATA.ch0_modfreq));
 541 
        sns_irTransceive_setConfig(0, eeprom_read_byte(EEDATA.ch0_config), eeprom_read_byte(EEDATA.ch0_txpower), eeprom_read_word(EEDATA16.ch0_modfreq));
542 
        sns_irTransceive_setConfig(1, eeprom_read_byte(EEDATA.ch1_config), eeprom_read_byte(EEDATA.ch1_txpower), eeprom_read_word(EEDATA.ch1_modfreq));
 542 
        sns_irTransceive_setConfig(1, eeprom_read_byte(EEDATA.ch1_config), eeprom_read_byte(EEDATA.ch1_txpower), eeprom_read_word(EEDATA16.ch1_modfreq));
543 
        sns_irTransceive_setConfig(2, eeprom_read_byte(EEDATA.ch2_config), eeprom_read_byte(EEDATA.ch2_txpower), eeprom_read_word(EEDATA.ch2_modfreq));
 543 
        sns_irTransceive_setConfig(2, eeprom_read_byte(EEDATA.ch2_config), eeprom_read_byte(EEDATA.ch2_txpower), eeprom_read_word(EEDATA16.ch2_modfreq));
544 
    }
 544 
    }
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    else
 545 
    else
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    {  
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    {  
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    /* The CRC of the EEPROM is not correct, store default values and update CRC */
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    /* The CRC of the EEPROM is not correct, store default values and update CRC */
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        eeprom_write_byte_crc(EEDATA.ch0_config, CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_AUTO, WITHOUT_CRC);
 548 
        eeprom_write_byte_crc(EEDATA.ch0_config, CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_AUTO, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch0_txpower, 0, WITHOUT_CRC);
 549 
        eeprom_write_byte_crc(EEDATA.ch0_txpower, 0, WITHOUT_CRC);
550 
        eeprom_write_word_crc(EEDATA.ch0_modfreq, sns_irTransceive_BaseFrq/38000UL, WITHOUT_CRC);
 550 
        eeprom_write_word_crc(EEDATA16.ch0_modfreq, sns_irTransceive_BaseFrq/38000UL, WITHOUT_CRC);
551 
        eeprom_write_byte_crc(EEDATA.ch1_config, CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_AUTO, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch1_config, CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_AUTO, WITHOUT_CRC);
552 
        eeprom_write_byte_crc(EEDATA.ch1_txpower, 0, WITHOUT_CRC);
 552 
        eeprom_write_byte_crc(EEDATA.ch1_txpower, 0, WITHOUT_CRC);
553 
        eeprom_write_word_crc(EEDATA.ch1_modfreq, sns_irTransceive_BaseFrq/38000UL, WITHOUT_CRC);
 553 
        eeprom_write_word_crc(EEDATA16.ch1_modfreq, sns_irTransceive_BaseFrq/38000UL, WITHOUT_CRC);
554 
        eeprom_write_byte_crc(EEDATA.ch2_config, CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_AUTO, WITHOUT_CRC);
 554 
        eeprom_write_byte_crc(EEDATA.ch2_config, CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_AUTO, WITHOUT_CRC);
555 
        eeprom_write_byte_crc(EEDATA.ch2_txpower, 0, WITHOUT_CRC);
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        eeprom_write_byte_crc(EEDATA.ch2_txpower, 0, WITHOUT_CRC);
556 
        eeprom_write_word_crc(EEDATA.ch2_modfreq, sns_irTransceive_BaseFrq/38000UL, WITHOUT_CRC);
 556 
        eeprom_write_word_crc(EEDATA16.ch2_modfreq, sns_irTransceive_BaseFrq/38000UL, WITHOUT_CRC);
557 
        EEDATA_UPDATE_CRC;
 557 
        EEDATA_UPDATE_CRC;
558 
    }
 558 
    }
559 
#endif 
559 
#endif 
560 
}
 560 
}
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Line 1040... Line 1040...
1040 
            switch (channel)
 1040 
            switch (channel)
1041 
            {
 1041 
            {
1042 
                case 0:
 1042 
                case 0:
1043 
                    eeprom_write_byte_crc(EEDATA.ch0_config, config, WITHOUT_CRC);
 1043 
                    eeprom_write_byte_crc(EEDATA.ch0_config, config, WITHOUT_CRC);
1044 
                    eeprom_write_byte_crc(EEDATA.ch0_txpower, power, WITHOUT_CRC);
 1044 
                    eeprom_write_byte_crc(EEDATA.ch0_txpower, power, WITHOUT_CRC);
1045 
                    eeprom_write_word_crc(EEDATA.ch0_modfreq, modfreq, WITHOUT_CRC);
 1045 
                    eeprom_write_word_crc(EEDATA16.ch0_modfreq, modfreq, WITHOUT_CRC);
1046 
                    break;
 1046 
                    break;
1047 
                case 1:
 1047 
                case 1:
1048 
                    eeprom_write_byte_crc(EEDATA.ch1_config, config, WITHOUT_CRC);
 1048 
                    eeprom_write_byte_crc(EEDATA.ch1_config, config, WITHOUT_CRC);
1049 
                    eeprom_write_byte_crc(EEDATA.ch1_txpower, power, WITHOUT_CRC);
 1049 
                    eeprom_write_byte_crc(EEDATA.ch1_txpower, power, WITHOUT_CRC);
1050 
                    eeprom_write_word_crc(EEDATA.ch1_modfreq, modfreq, WITHOUT_CRC);
 1050 
                    eeprom_write_word_crc(EEDATA16.ch1_modfreq, modfreq, WITHOUT_CRC);
1051 
                    break;
 1051 
                    break;
1052 
                case 2:
 1052 
                case 2:
1053 
                    eeprom_write_byte_crc(EEDATA.ch2_config, config, WITHOUT_CRC);
 1053 
                    eeprom_write_byte_crc(EEDATA.ch2_config, config, WITHOUT_CRC);
1054 
                    eeprom_write_byte_crc(EEDATA.ch2_txpower, power, WITHOUT_CRC);
 1054 
                    eeprom_write_byte_crc(EEDATA.ch2_txpower, power, WITHOUT_CRC);
1055 
                    eeprom_write_word_crc(EEDATA.ch2_modfreq, modfreq, WITHOUT_CRC);
 1055 
                    eeprom_write_word_crc(EEDATA16.ch2_modfreq, modfreq, WITHOUT_CRC);
1056 
                    break;
 1056 
                    break;
1057 
                default:
 1057 
                default:
1058 
                    break;
 1058 
                    break;
1059 
            }
 1059 
            }
1060 
            EEDATA_UPDATE_CRC;
 1060 
            EEDATA_UPDATE_CRC;