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| Rev 1944 | Rev 1975 | ||
|---|---|---|---|
| Line 96... | Line 96... | ||
| 96 | #endif |
96 | #endif |
| 97 | 97 | ||
| 98 | #define sns_irTransceive_BaseFrq (4145146UL) |
98 | #define sns_irTransceive_BaseFrq (4145146UL) |
| 99 | 99 | ||
| 100 | #define channelIsOk(_ch) ((_ch)>=0 && (_ch)<IR_SUPPORTED_NUM_CHANNELS) |
100 | #define channelIsOk(_ch) ((_ch)>=0 && (_ch)<IR_SUPPORTED_NUM_CHANNELS) |
| 101 | - | ||
| 102 | #ifndef sns_irTransceive_PRONTO_SUPPORT |
- | |
| 103 | #define sns_irTransceive_PRONTO_SUPPORT 0 |
- | |
| 104 | #endif |
- | |
| 105 | 101 | ||
| 106 | /* |
102 | /* |
| 107 | * PRONTO HEX Routines |
103 | * PRONTO HEX Routines |
| 108 | */ |
104 | */ |
| - | 105 | #if IR_TX_ENABLE==1 |
|
| 109 | static void pronto_sendResponse(uint8_t channel, uint8_t responseValue) |
106 | static void pronto_sendResponse(uint8_t channel, uint8_t responseValue) |
| 110 | { |
107 | { |
| 111 | StdCan_Msg_t msg; |
108 | StdCan_Msg_t msg; |
| 112 | StdCan_Set_class(msg.Header, CAN_MODULE_CLASS_SNS); |
109 | StdCan_Set_class(msg.Header, CAN_MODULE_CLASS_SNS); |
| 113 | StdCan_Set_direction(msg.Header, DIRECTIONFLAG_FROM_OWNER); |
110 | StdCan_Set_direction(msg.Header, DIRECTIONFLAG_FROM_OWNER); |
| 114 | msg.Header.ModuleType = CAN_MODULE_TYPE_SNS_IRTRANSCEIVE; |
111 | msg.Header.ModuleType = CAN_MODULE_TYPE_SNS_IRTRANSCEIVE; |
| 115 | msg.Header.ModuleId = sns_irTransceive_ID; |
112 | msg.Header.ModuleId = sns_irTransceive_ID; |
| 116 | /* Send response command. */ |
113 | /* Send response command. */ |
| Line 119... | Line 116... | ||
| 119 | msg.Data[0] = ((channel<<4)|0xf); |
116 | msg.Data[0] = ((channel<<4)|0xf); |
| 120 | msg.Data[1] = 0xF0; |
117 | msg.Data[1] = 0xF0; |
| 121 | msg.Data[2] = (uint8_t)responseValue; |
118 | msg.Data[2] = (uint8_t)responseValue; |
| 122 | while (StdCan_Put(&msg) != StdCan_Ret_OK) {} |
119 | while (StdCan_Put(&msg) != StdCan_Ret_OK) {} |
| 123 | _delay_ms(1); |
120 | _delay_ms(1); |
| 124 | } |
121 | } |
| 125 | 122 | ||
| 126 | static uint8_t prontoAllocatedTxChannel = -1; |
123 | static uint8_t prontoAllocatedTxChannel = -1; |
| - | 124 | #endif |
|
| 127 | 125 | ||
| 128 | #if sns_irTransceive_PRONTO_SUPPORT==1 |
126 | #if sns_irTransceive_PRONTO_SUPPORT==1 |
| 129 | volatile uint32_t sns_irTransceive_LastPronto=0; |
127 | volatile uint32_t sns_irTransceive_LastPronto=0; |
| 130 | 128 | ||
| - | 129 | #if IR_TX_ENABLE==1 |
|
| 131 | /* is any channel transmitting (or preparing to transmit) pronto? */ |
130 | /* is any channel transmitting (or preparing to transmit) pronto? */ |
| 132 | static inline int8_t prontoChannelIsAllocated(void) |
131 | static inline int8_t prontoChannelIsAllocated(void) |
| 133 | { |
132 | { |
| 134 | if (prontoAllocatedTxChannel >= 0 && |
133 | if (prontoAllocatedTxChannel >= 0 && |
| 135 | prontoAllocatedTxChannel < IR_SUPPORTED_NUM_CHANNELS && |
134 | prontoAllocatedTxChannel < IR_SUPPORTED_NUM_CHANNELS && |
| 136 | irTxChannel[prontoAllocatedTxChannel].state != sns_irTransceive_STATE_DISABLED) |
135 | irTxChannel[prontoAllocatedTxChannel].state != sns_irTransceive_STATE_DISABLED) |
| 137 | { |
136 | { |
| 138 | return 1; |
137 | return 1; |
| 139 | } |
138 | } |
| 140 | return 0; |
139 | return 0; |
| 141 | } |
140 | } |
| 142 | 141 | #endif |
|
| 143 | 142 | ||
| 144 | #define sns_irTransceive_MAXTIMING (16*1000) |
143 | #define sns_irTransceive_MAXTIMING (16*1000) |
| 145 | 144 | ||
| 146 | static void pronto_sendData(uint16_t *buffer, uint8_t len, uint8_t channel, uint16_t modfreq) |
145 | static void pronto_sendData(uint16_t *buffer, uint8_t len, uint8_t channel, uint16_t modfreq) |
| 147 | { |
146 | { |
| Line 155... | Line 154... | ||
| 155 | msg.Header.ModuleId = sns_irTransceive_ID; |
154 | msg.Header.ModuleId = sns_irTransceive_ID; |
| 156 | 155 | ||
| 157 | /* Send timing command. */ |
156 | /* Send timing command. */ |
| 158 | msg.Length = 5; |
157 | msg.Length = 5; |
| 159 | msg.Header.Command = CAN_MODULE_CMD_IRTRANSCEIVE_IRPRONTOTIMING; |
158 | msg.Header.Command = CAN_MODULE_CMD_IRTRANSCEIVE_IRPRONTOTIMING; |
| 160 | 159 | ||
| 161 | if ((currentTime < sns_irTransceive_LastPronto+sns_irTransceive_MAXTIMING) && (sns_irTransceive_LastPronto != 0)) |
160 | if ((currentTime < sns_irTransceive_LastPronto+sns_irTransceive_MAXTIMING) && (sns_irTransceive_LastPronto != 0)) |
| 162 | { |
161 | { |
| 163 | /* Calculate elapsed time since last pronto packet. */ |
162 | /* Calculate elapsed time since last pronto packet. */ |
| 164 | uint32_t elapsedTime = ((currentTime - sns_irTransceive_LastPronto) * 1000) & 0x00FFFFFFUL; /* 24bit value. */ |
163 | uint32_t elapsedTime = ((currentTime - sns_irTransceive_LastPronto) * 1000) & 0x00FFFFFFUL; /* 24bit value. */ |
| 165 | 164 | ||
| Line 212... | Line 211... | ||
| 212 | /* Remember byte if data does not fit 8 bit. */ |
211 | /* Remember byte if data does not fit 8 bit. */ |
| 213 | uint8_t mem = 0; |
212 | uint8_t mem = 0; |
| 214 | while (i < len) |
213 | while (i < len) |
| 215 | { |
214 | { |
| 216 | if (mem > 0) |
215 | if (mem > 0) |
| 217 | { |
216 | { |
| 218 | /* If byte was memorized then buffer it. */ |
217 | /* If byte was memorized then buffer it. */ |
| 219 | msg.Data[j] = mem; |
218 | msg.Data[j] = mem; |
| 220 | /* Clear memory. */ |
219 | /* Clear memory. */ |
| 221 | mem = 0; |
220 | mem = 0; |
| 222 | } |
221 | } |
| 223 | else |
222 | else |
| 224 | { |
223 | { |
| 225 | /* Convert µs to pronto hex modulation pulses. */ |
224 | /* Convert µs to pronto hex modulation pulses. */ |
| 226 | uint16_t data = (uint16_t)(((uint32_t)buffer[i] * (uint32_t)modfreq) / 1000); |
225 | uint16_t data = (uint16_t)(((uint32_t)buffer[i] * (uint32_t)modfreq) / 1000); |
| 227 | 226 | ||
| 228 | /* Protocol compression. */ |
227 | /* Protocol compression. */ |
| 229 | if (data >= 256) |
228 | if (data >= 256) |
| 230 | { |
229 | { |
| 231 | /* If data does not fit into 8 bit, then split, memorize low byte. */ |
230 | /* If data does not fit into 8 bit, then split, memorize low byte. */ |
| 232 | mem = data&0xff; |
231 | mem = data&0xff; |
| 233 | /* Buffer high byte. */ |
232 | /* Buffer high byte. */ |
| 234 | msg.Data[j] = (data>>8)&0xff; |
233 | msg.Data[j] = (data>>8)&0xff; |
| 235 | j++; |
234 | j++; |
| 236 | if (j==8) |
235 | if (j==8) |
| 237 | { |
236 | { |
| 238 | /* If send buffer is full, send frame. */ |
237 | /* If send buffer is full, send frame. */ |
| 239 | /* Can buffers will be filled when sending more than 2-3 messages, so retry until sent. */ |
238 | /* Can buffers will be filled when sending more than 2-3 messages, so retry until sent. */ |
| 240 | while (StdCan_Put(&msg) != StdCan_Ret_OK) {} |
239 | while (StdCan_Put(&msg) != StdCan_Ret_OK) {} |
| 241 | _delay_ms(1); |
240 | _delay_ms(1); |
| 242 | j=0; |
241 | j=0; |
| 243 | seqNr = (seqNr + 1) % 16; |
242 | seqNr = (seqNr + 1) % 16; |
| 244 | msg.Header.Command = CAN_MODULE_CMD_IRTRANSCEIVE_IRPRONTODATA1 + seqNr; |
243 | msg.Header.Command = CAN_MODULE_CMD_IRTRANSCEIVE_IRPRONTODATA1 + seqNr; |
| 245 | } |
244 | } |
| 246 | /* Set complementary burst pair to 0 to indicate 16bit transmission. */ |
245 | /* Set complementary burst pair to 0 to indicate 16bit transmission. */ |
| 247 | msg.Data[j] = 0; |
246 | msg.Data[j] = 0; |
| 248 | } |
247 | } |
| 249 | else |
248 | else |
| Line 252... | Line 251... | ||
| 252 | } |
251 | } |
| 253 | 252 | ||
| 254 | i++; |
253 | i++; |
| 255 | } |
254 | } |
| 256 | 255 | ||
| 257 | j++; |
256 | j++; |
| 258 | if (j==8) |
257 | if (j==8) |
| 259 | { |
258 | { |
| 260 | /* If send buffer is full, send frame. */ |
259 | /* If send buffer is full, send frame. */ |
| 261 | /* Can buffers will be filled when sending more than 2-3 messages, so retry until sent. */ |
260 | /* Can buffers will be filled when sending more than 2-3 messages, so retry until sent. */ |
| 262 | while (StdCan_Put(&msg) != StdCan_Ret_OK) {} |
261 | while (StdCan_Put(&msg) != StdCan_Ret_OK) {} |
| 263 | _delay_ms(1); |
262 | _delay_ms(1); |
| Line 267... | Line 266... | ||
| 267 | } |
266 | } |
| 268 | } |
267 | } |
| 269 | 268 | ||
| 270 | /* End with max pulse. TODO: fix uglyness. */ |
269 | /* End with max pulse. TODO: fix uglyness. */ |
| 271 | msg.Data[j] = ((IR_MAX_PULSE_WIDTH/((1000000ULL*109)/sns_irTransceive_BaseFrq))>>8) & 0xFF; |
270 | msg.Data[j] = ((IR_MAX_PULSE_WIDTH/((1000000ULL*109)/sns_irTransceive_BaseFrq))>>8) & 0xFF; |
| 272 | j++; |
271 | j++; |
| 273 | if (j==8) |
272 | if (j==8) |
| 274 | { |
273 | { |
| 275 | /* If send buffer is full, send frame. */ |
274 | /* If send buffer is full, send frame. */ |
| 276 | /* Can buffers will be filled when sending more than 2-3 messages, so retry until sent. */ |
275 | /* Can buffers will be filled when sending more than 2-3 messages, so retry until sent. */ |
| 277 | while (StdCan_Put(&msg) != StdCan_Ret_OK) {} |
276 | while (StdCan_Put(&msg) != StdCan_Ret_OK) {} |
| 278 | _delay_ms(1); |
277 | _delay_ms(1); |
| 279 | j=0; |
278 | j=0; |
| 280 | seqNr = (seqNr + 1) % 16; |
279 | seqNr = (seqNr + 1) % 16; |
| 281 | msg.Header.Command = CAN_MODULE_CMD_IRTRANSCEIVE_IRPRONTODATA1 + seqNr; |
280 | msg.Header.Command = CAN_MODULE_CMD_IRTRANSCEIVE_IRPRONTODATA1 + seqNr; |
| 282 | } |
281 | } |
| 283 | msg.Data[j] = 0; |
282 | msg.Data[j] = 0; |
| 284 | j++; |
283 | j++; |
| Line 286... | Line 285... | ||
| 286 | j++; |
285 | j++; |
| 287 | if (j==8) |
286 | if (j==8) |
| 288 | { |
287 | { |
| 289 | /* If send buffer is full, send frame. */ |
288 | /* If send buffer is full, send frame. */ |
| 290 | /* Can buffers will be filled when sending more than 2-3 messages, so retry until sent. */ |
289 | /* Can buffers will be filled when sending more than 2-3 messages, so retry until sent. */ |
| 291 | while (StdCan_Put(&msg) != StdCan_Ret_OK) {} |
290 | while (StdCan_Put(&msg) != StdCan_Ret_OK) {} |
| 292 | _delay_ms(1); |
291 | _delay_ms(1); |
| 293 | j=0; |
292 | j=0; |
| 294 | seqNr = (seqNr + 1) % 16; |
293 | seqNr = (seqNr + 1) % 16; |
| 295 | msg.Header.Command = CAN_MODULE_CMD_IRTRANSCEIVE_IRPRONTODATA1 + seqNr; |
294 | msg.Header.Command = CAN_MODULE_CMD_IRTRANSCEIVE_IRPRONTODATA1 + seqNr; |
| 296 | } |
295 | } |
| Line 303... | Line 302... | ||
| 303 | while (StdCan_Put(&msg) != StdCan_Ret_OK) {} |
302 | while (StdCan_Put(&msg) != StdCan_Ret_OK) {} |
| 304 | _delay_ms(1); |
303 | _delay_ms(1); |
| 305 | } |
304 | } |
| 306 | 305 | ||
| 307 | 306 | ||
| - | 307 | #if IR_TX_ENABLE==1 |
|
| 308 | static int decodeProntoData(int channel, uint8_t data) |
308 | static int decodeProntoData(int channel, uint8_t data) |
| 309 | { |
309 | { |
| 310 | static uint8_t waitingForLSB = FALSE; |
310 | static uint8_t waitingForLSB = FALSE; |
| 311 | static uint8_t previousValueWas16bit = FALSE; |
311 | static uint8_t previousValueWas16bit = FALSE; |
| 312 | 312 | ||
| Line 358... | Line 358... | ||
| 358 | irTxChannel[channel].txlen++; |
358 | irTxChannel[channel].txlen++; |
| 359 | } |
359 | } |
| 360 | 360 | ||
| 361 | return 1; |
361 | return 1; |
| 362 | } |
362 | } |
| - | 363 | #endif |
|
| 363 | 364 | ||
| 364 | #endif |
365 | #endif |
| 365 | 366 | ||
| 366 | 367 | ||
| 367 | #if IR_RX_ENABLE==1 |
368 | #if IR_RX_ENABLE==1 |
| 368 | void sns_irTransceive_RX_done_callback(uint8_t channel, uint16_t *buffer, uint8_t len) |
369 | void sns_irTransceive_RX_done_callback(uint8_t channel, uint16_t *buffer, uint8_t len) |
| 369 | { |
370 | { |
| 370 | if (channel < IR_SUPPORTED_NUM_CHANNELS) |
371 | if (channel < IR_SUPPORTED_NUM_CHANNELS) |
| 371 | { |
372 | { |
| 372 | irRxChannel[channel].newData = TRUE; |
373 | irRxChannel[channel].newData = TRUE; |
| 373 | irRxChannel[channel].rxlen = len; |
374 | irRxChannel[channel].rxlen = len; |
| 374 | } |
375 | } |
| 375 | } |
376 | } |
| 376 | #endif |
377 | #endif |
| 377 | 378 | ||
| 378 | 379 | ||
| 379 | #if IR_TX_ENABLE==1 |
380 | #if IR_TX_ENABLE==1 |
| 380 | void sns_irTransceive_TX_done_callback(uint8_t channel) |
381 | void sns_irTransceive_TX_done_callback(uint8_t channel) |
| 381 | { |
382 | { |
| 382 | if (channel < IR_SUPPORTED_NUM_CHANNELS) |
383 | if (channel < IR_SUPPORTED_NUM_CHANNELS) |
| 383 | { |
384 | { |
| 384 | irTxChannel[channel].sendComplete = TRUE; |
385 | irTxChannel[channel].sendComplete = TRUE; |
| 385 | } |
386 | } |
| 386 | } |
387 | } |
| 387 | #endif |
388 | #endif |
| 388 | 389 | ||
| 389 | 390 | ||
| 390 | static void sns_irTransceive_setConfig(uint8_t channel, uint8_t config, uint8_t power, uint16_t modfreq) |
391 | static void sns_irTransceive_setConfig(uint8_t channel, uint8_t config, uint8_t power, uint16_t modfreq) |
| 391 | { |
392 | { |
| 392 | if (channel < IR_SUPPORTED_NUM_CHANNELS && config <= CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_RECEIVE && power < 4) |
393 | if (channel < IR_SUPPORTED_NUM_CHANNELS && config <= CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_RECEIVE && power < 4) |
| 393 | { |
394 | { |
| 394 | #if IR_RX_ENABLE==1 |
395 | #if IR_RX_ENABLE==1 |
| 395 | if (config == CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_RECEIVE) |
396 | if (config == CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_RECEIVE) |
| 396 | { |
397 | { |
| 397 | #if IR_TX_ENABLE==1 |
398 | #if IR_TX_ENABLE==1 |
| 398 | irTxChannel[channel].state = sns_irTransceive_STATE_DISABLED; |
399 | irTxChannel[channel].state = sns_irTransceive_STATE_DISABLED; |
| 399 | #endif |
400 | #endif |
| 400 | irRxChannel[channel].proto.modfreq = modfreq; |
401 | irRxChannel[channel].proto.modfreq = modfreq; |
| 401 | irRxChannel[channel].rxbuf = buf[channel]; |
402 | irRxChannel[channel].rxbuf = buf[channel]; |
| 402 | switch (channel) |
403 | switch (channel) |
| 403 | { |
404 | { |
| 404 | case 0: |
405 | case 0: |
| - | 406 | #ifdef sns_irTransceive_VCC_EN0_PIN |
|
| 405 | gpio_clr_pin(sns_irTransceive_VCC_EN0_PIN); |
407 | gpio_clr_pin(sns_irTransceive_VCC_EN0_PIN); |
| - | 408 | #endif |
|
| - | 409 | #ifdef sns_irTransceive_RX0_PIN |
|
| 406 | IrTransceiver_InitRxChannel(channel, irRxChannel[channel].rxbuf, sns_irTransceive_RX_done_callback, sns_irTransceive_RX0_PCINT, sns_irTransceive_RX0_PIN); |
410 | IrTransceiver_InitRxChannel(channel, irRxChannel[channel].rxbuf, sns_irTransceive_RX_done_callback, sns_irTransceive_RX0_PCINT, sns_irTransceive_RX0_PIN); |
| - | 411 | #endif |
|
| 407 | break; |
412 | break; |
| 408 | case 1: |
413 | case 1: |
| - | 414 | #ifdef sns_irTransceive_VCC_EN1_PIN |
|
| 409 | gpio_clr_pin(sns_irTransceive_VCC_EN1_PIN); |
415 | gpio_clr_pin(sns_irTransceive_VCC_EN1_PIN); |
| - | 416 | #endif |
|
| - | 417 | #ifdef sns_irTransceive_RX1_PIN |
|
| 410 | IrTransceiver_InitRxChannel(channel, irRxChannel[channel].rxbuf, sns_irTransceive_RX_done_callback, sns_irTransceive_RX1_PCINT, sns_irTransceive_RX1_PIN); |
418 | IrTransceiver_InitRxChannel(channel, irRxChannel[channel].rxbuf, sns_irTransceive_RX_done_callback, sns_irTransceive_RX1_PCINT, sns_irTransceive_RX1_PIN); |
| - | 419 | #endif |
|
| 411 | break; |
420 | break; |
| 412 | case 2: |
421 | case 2: |
| - | 422 | #ifdef sns_irTransceive_VCC_EN2_PIN |
|
| 413 | gpio_clr_pin(sns_irTransceive_VCC_EN2_PIN); |
423 | gpio_clr_pin(sns_irTransceive_VCC_EN2_PIN); |
| - | 424 | #endif |
|
| - | 425 | #ifdef sns_irTransceive_RX2_PIN |
|
| 414 | IrTransceiver_InitRxChannel(channel, irRxChannel[channel].rxbuf, sns_irTransceive_RX_done_callback, sns_irTransceive_RX2_PCINT, sns_irTransceive_RX2_PIN); |
426 | IrTransceiver_InitRxChannel(channel, irRxChannel[channel].rxbuf, sns_irTransceive_RX_done_callback, sns_irTransceive_RX2_PCINT, sns_irTransceive_RX2_PIN); |
| - | 427 | #endif |
|
| 415 | break; |
428 | break; |
| 416 | } |
429 | } |
| 417 | irRxChannel[channel].state = sns_irTransceive_STATE_RECEIVING; |
430 | irRxChannel[channel].state = sns_irTransceive_STATE_RECEIVING; |
| 418 | } |
431 | } |
| 419 | #endif |
432 | #endif |
| 420 | 433 | ||
| 421 | #if IR_TX_ENABLE==1 |
434 | #if IR_TX_ENABLE==1 |
| 422 | if (config == CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_TRANSMIT) |
435 | if (config == CAN_MODULE_ENUM_IRTRANSCEIVE_IRCONFIG_DIRECTION_TRANSMIT) |
| 423 | { |
436 | { |
| 424 | #if IR_RX_ENABLE==1 |
437 | #if IR_RX_ENABLE==1 |
| 425 | irRxChannel[channel].state = sns_irTransceive_STATE_DISABLED; |
438 | irRxChannel[channel].state = sns_irTransceive_STATE_DISABLED; |
| 426 | #endif |
439 | #endif |
| 427 | irTxChannel[channel].txbuf = buf[channel]; |
440 | irTxChannel[channel].txbuf = buf[channel]; |
| 428 | switch (channel) |
441 | switch (channel) |
| 429 | { |
442 | { |
| 430 | case 0: |
443 | case 0: |
| 431 | #if IR_RX_ENABLE==1 |
444 | #if IR_RX_ENABLE==1 |
| - | 445 | #ifdef sns_irTransceive_VCC_EN0_PIN |
|
| 432 | gpio_set_pin(sns_irTransceive_VCC_EN0_PIN); |
446 | gpio_set_pin(sns_irTransceive_VCC_EN0_PIN); |
| - | 447 | #endif |
|
| 433 | IrTransceiver_DeInitRxChannel(channel, sns_irTransceive_RX0_PCINT, sns_irTransceive_RX0_PIN); |
448 | IrTransceiver_DeInitRxChannel(channel, sns_irTransceive_RX0_PCINT, sns_irTransceive_RX0_PIN); |
| 434 | #endif |
449 | #endif |
| 435 | IrTransceiver_InitTxChannel(channel, sns_irTransceive_TX_done_callback, sns_irTransceive_TX0_PIN); |
450 | IrTransceiver_InitTxChannel(channel, sns_irTransceive_TX_done_callback, sns_irTransceive_TX0_PIN); |
| 436 | 451 | ||
| 437 | #if sns_irTransceive_ENABLE_PCA95xx==1 |
452 | #if sns_irTransceive_ENABLE_PCA95xx==1 |
| Line 439... | Line 454... | ||
| 439 | Pca95xx_set_out(sns_irTransceive_TX0_PWRh); |
454 | Pca95xx_set_out(sns_irTransceive_TX0_PWRh); |
| 440 | if (power&0x1) |
455 | if (power&0x1) |
| 441 | { |
456 | { |
| 442 | Pca95xx_set_in(sns_irTransceive_TX0_PWRl); |
457 | Pca95xx_set_in(sns_irTransceive_TX0_PWRl); |
| 443 | } |
458 | } |
| 444 | if (power&0x2) |
459 | if (power&0x2) |
| 445 | { |
460 | { |
| 446 | Pca95xx_set_in(sns_irTransceive_TX0_PWRh); |
461 | Pca95xx_set_in(sns_irTransceive_TX0_PWRh); |
| 447 | } |
462 | } |
| 448 | #endif |
463 | #endif |
| 449 | break; |
464 | break; |
| 450 | case 1: |
465 | case 1: |
| 451 | #if IR_RX_ENABLE==1 |
466 | #if IR_RX_ENABLE==1 |
| - | 467 | #ifdef sns_irTransceive_VCC_EN1_PIN |
|
| 452 | gpio_set_pin(sns_irTransceive_VCC_EN1_PIN); |
468 | gpio_set_pin(sns_irTransceive_VCC_EN1_PIN); |
| - | 469 | #endif |
|
| 453 | IrTransceiver_DeInitRxChannel(channel, sns_irTransceive_RX1_PCINT, sns_irTransceive_RX1_PIN); |
470 | IrTransceiver_DeInitRxChannel(channel, sns_irTransceive_RX1_PCINT, sns_irTransceive_RX1_PIN); |
| 454 | #endif |
471 | #endif |
| 455 | IrTransceiver_InitTxChannel(channel, sns_irTransceive_TX_done_callback, sns_irTransceive_TX1_PIN); |
472 | IrTransceiver_InitTxChannel(channel, sns_irTransceive_TX_done_callback, sns_irTransceive_TX1_PIN); |
| 456 | 473 | ||
| 457 | #if sns_irTransceive_ENABLE_PCA95xx==1 |
474 | #if sns_irTransceive_ENABLE_PCA95xx==1 |
| Line 467... | Line 484... | ||
| 467 | } |
484 | } |
| 468 | #endif |
485 | #endif |
| 469 | break; |
486 | break; |
| 470 | case 2: |
487 | case 2: |
| 471 | #if IR_RX_ENABLE==1 |
488 | #if IR_RX_ENABLE==1 |
| - | 489 | #ifdef sns_irTransceive_VCC_EN2_PIN |
|
| 472 | gpio_set_pin(sns_irTransceive_VCC_EN2_PIN); |
490 | gpio_set_pin(sns_irTransceive_VCC_EN2_PIN); |
| - | 491 | #endif |
|
| 473 | IrTransceiver_DeInitRxChannel(channel, sns_irTransceive_RX2_PCINT, sns_irTransceive_RX2_PIN); |
492 | IrTransceiver_DeInitRxChannel(channel, sns_irTransceive_RX2_PCINT, sns_irTransceive_RX2_PIN); |
| 474 | #endif |
493 | #endif |
| 475 | IrTransceiver_InitTxChannel(channel, sns_irTransceive_TX_done_callback, sns_irTransceive_TX2_PIN); |
494 | IrTransceiver_InitTxChannel(channel, sns_irTransceive_TX_done_callback, sns_irTransceive_TX2_PIN); |
| 476 | 495 | ||
| 477 | #if sns_irTransceive_ENABLE_PCA95xx==1 |
496 | #if sns_irTransceive_ENABLE_PCA95xx==1 |
| Line 527... | Line 546... | ||
| 527 | irTxChannel[i].proto.protocol=0; |
546 | irTxChannel[i].proto.protocol=0; |
| 528 | #endif |
547 | #endif |
| 529 | } |
548 | } |
| 530 | 549 | ||
| 531 | #if IR_RX_ENABLE==1 |
550 | #if IR_RX_ENABLE==1 |
| - | 551 | #ifdef sns_irTransceive_RX0_REPEATE_TIMER |
|
| 532 | if (IR_SUPPORTED_NUM_CHANNELS>=1) irRxChannel[0].timerNum=sns_irTransceive_RX0_REPEATE_TIMER; |
552 | if (IR_SUPPORTED_NUM_CHANNELS>=1) irRxChannel[0].timerNum=sns_irTransceive_RX0_REPEATE_TIMER; |
| - | 553 | #endif |
|
| - | 554 | #ifdef sns_irTransceive_RX1_REPEATE_TIMER |
|
| 533 | if (IR_SUPPORTED_NUM_CHANNELS>=2) irRxChannel[1].timerNum=sns_irTransceive_RX1_REPEATE_TIMER; |
555 | if (IR_SUPPORTED_NUM_CHANNELS>=2) irRxChannel[1].timerNum=sns_irTransceive_RX1_REPEATE_TIMER; |
| 534 | if (IR_SUPPORTED_NUM_CHANNELS>=3) irRxChannel[2].timerNum=sns_irTransceive_RX2_REPEATE_TIMER; |
- | |
| 535 | #endif |
556 | #endif |
| - | 557 | #ifdef sns_irTransceive_RX2_REPEATE_TIMER |
|
| - | 558 | if (IR_SUPPORTED_NUM_CHANNELS>=3) irRxChannel[2].timerNum=sns_irTransceive_RX2_REPEATE_TIMER; |
|
| - | 559 | #endif |
|
| - | 560 | #endif |
|
| 536 | 561 | ||
| 537 | #if IR_TX_ENABLE==1 |
562 | #if IR_TX_ENABLE==1 |
| 538 | if (IR_SUPPORTED_NUM_CHANNELS>=1) irTxChannel[0].timerNum=sns_irTransceive_TX0_REPEATE_TIMER; |
563 | if (IR_SUPPORTED_NUM_CHANNELS>=1) irTxChannel[0].timerNum=sns_irTransceive_TX0_REPEATE_TIMER; |
| 539 | if (IR_SUPPORTED_NUM_CHANNELS>=2) irTxChannel[1].timerNum=sns_irTransceive_TX1_REPEATE_TIMER; |
564 | if (IR_SUPPORTED_NUM_CHANNELS>=2) irTxChannel[1].timerNum=sns_irTransceive_TX1_REPEATE_TIMER; |
| 540 | if (IR_SUPPORTED_NUM_CHANNELS>=3) irTxChannel[2].timerNum=sns_irTransceive_TX2_REPEATE_TIMER; |
565 | if (IR_SUPPORTED_NUM_CHANNELS>=3) irTxChannel[2].timerNum=sns_irTransceive_TX2_REPEATE_TIMER; |
| 541 | #endif |
566 | #endif |
| 542 | 567 | ||
| 543 | IrTransceiver_Init(); |
568 | IrTransceiver_Init(); |
| 544 | /* Configure all TX VCC pins as outputs and disable them. */ |
569 | /* Configure all TX VCC pins as outputs and disable them. */ |
| - | 570 | #ifdef sns_irTransceive_VCC_EN0_PIN |
|
| 545 | gpio_set_out(sns_irTransceive_VCC_EN0_PIN); |
571 | gpio_set_out(sns_irTransceive_VCC_EN0_PIN); |
| 546 | gpio_set_out(sns_irTransceive_VCC_EN1_PIN); |
- | |
| 547 | gpio_set_out(sns_irTransceive_VCC_EN2_PIN); |
- | |
| 548 | gpio_set_pin(sns_irTransceive_VCC_EN0_PIN); |
572 | gpio_set_pin(sns_irTransceive_VCC_EN0_PIN); |
| - | 573 | #endif |
|
| - | 574 | #ifdef sns_irTransceive_VCC_EN1_PIN |
|
| - | 575 | gpio_set_out(sns_irTransceive_VCC_EN1_PIN); |
|
| 549 | gpio_set_pin(sns_irTransceive_VCC_EN1_PIN); |
576 | gpio_set_pin(sns_irTransceive_VCC_EN1_PIN); |
| - | 577 | #endif |
|
| - | 578 | #ifdef sns_irTransceive_VCC_EN2_PIN |
|
| - | 579 | gpio_set_out(sns_irTransceive_VCC_EN2_PIN); |
|
| 550 | gpio_set_pin(sns_irTransceive_VCC_EN2_PIN); |
580 | gpio_set_pin(sns_irTransceive_VCC_EN2_PIN); |
| - | 581 | #endif |
|
| 551 | 582 | ||
| 552 |
|
583 | #if IR_TX_ENABLE==1 |
| 553 | gpio_set_out(sns_irTransceive_MOD_PIN); |
584 | gpio_set_out(sns_irTransceive_MOD_PIN); |
| 554 | gpio_set_out(sns_irTransceive_TX0_PIN); |
585 | gpio_set_out(sns_irTransceive_TX0_PIN); |
| 555 | gpio_set_out(sns_irTransceive_TX1_PIN); |
586 | gpio_set_out(sns_irTransceive_TX1_PIN); |
| 556 | gpio_set_out(sns_irTransceive_TX2_PIN); |
587 | gpio_set_out(sns_irTransceive_TX2_PIN); |
| 557 | #if IR_TX_ACTIVE_LOW==1 |
588 | #if IR_TX_ACTIVE_LOW==1 |
| 558 | gpio_set_pin(sns_irTransceive_TX0_PIN); |
589 | gpio_set_pin(sns_irTransceive_TX0_PIN); |
| 559 | gpio_set_pin(sns_irTransceive_TX1_PIN); |
590 | gpio_set_pin(sns_irTransceive_TX1_PIN); |
| 560 | gpio_set_pin(sns_irTransceive_TX2_PIN); |
591 | gpio_set_pin(sns_irTransceive_TX2_PIN); |
| - | 592 | #endif |
|
| 561 | #endif |
593 | #endif |
| 562 | 594 | ||
| 563 | /* IR tx power pins on PCA95xx. */ |
595 | /* IR tx power pins on PCA95xx. */ |
| 564 | #if sns_irTransceive_ENABLE_PCA95xx==1 |
596 | #if sns_irTransceive_ENABLE_PCA95xx==1 |
| 565 | Pca95xx_Init(0); |
597 | Pca95xx_Init(0); |