Subversion Repositories HomeAutomation

Rev

Rev 87 | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | SVN | RSS feed

Rev 87 Rev 95
Line 2... Line 2...
2 
 *
 2 
 *
3 
 *                  CAN module
 3 
 *                  CAN module
4 
 *
 4 
 *
5 
 *********************************************************************
 5 
 *********************************************************************
6 
 * FileName:        $HeadURL: https://svn.auml.se/svn/HomeAutomation/trunk/EmbeddedSoftware/PIC/canBase/Source/CAN.c $
 6 
 * FileName:        $HeadURL: https://svn.auml.se/svn/HomeAutomation/trunk/EmbeddedSoftware/PIC/canBase/Source/CAN.c $
7 
 * Last changed:    $LastChangedDate: 2006-11-14 11:20:48 +0100 (Tue, 14 Nov 2006) $
 7 
 * Last changed:    $LastChangedDate: 2006-11-14 21:11:28 +0100 (Tue, 14 Nov 2006) $
8 
 * By:              $LastChangedBy: johboh $
 8 
 * By:              $LastChangedBy: johboh $
9 
 * Revision:        $Revision: 87 $
 9 
 * Revision:        $Revision: 95 $
10 
 ********************************************************************/
 10 
 ********************************************************************/
11 
 
 11 
 
12 
#include <CANdefs.h>
 12 
#include <CANdefs.h>
13 
#include <stackTasks.h>
 13 
#include <stackTasks.h>
14 
#include <CAN.h>
 14 
#include <CAN.h>
Line 66... Line 66...
66 
    BRGCON3bits.SEG2PH2 = 0;
 66 
    BRGCON3bits.SEG2PH2 = 0;
67 
    BRGCON3bits.SEG2PH1 = 0;
 67 
    BRGCON3bits.SEG2PH1 = 0;
68 
    BRGCON3bits.SEG2PH0 = 1;
 68 
    BRGCON3bits.SEG2PH0 = 1;
69 
 
 69 
 
70 
    ECANCON=0;
 70 
    ECANCON=0;
71 
    ECANCONbits.MDSEL1 = 0;
 71 
    ECANCONbits.MDSEL1 = 1; // 0  For mode 1
72 
    ECANCONbits.MDSEL0 = 1;
 72 
    ECANCONbits.MDSEL0 = 0; // 1  For mode 1
73 
 
 73 
 
74 
 
 74 
 
75 
    // FILTERS AND MASKS
 75 
    // FILTERS AND MASKS
76 
    RXB0CONbits.RXM1=1;
 76 
    RXB0CONbits.RXM1=1;
77 
    RXB0CONbits.RXM0=0;
 77 
    RXB0CONbits.RXM0=0;
Line 114... Line 114...
114 
*   Affects: interrupt registers and receive data buffers
 114 
*   Affects: interrupt registers and receive data buffers
115 
*   Depends: ..
 115 
*   Depends: ..
116 
*/
 116 
*/
117 
void canISR()
 117 
void canISR()
118 
{
 118 
{
119 
 
 - 
 
120 
 
 - 
 
121 
    if (PIR3bits.RXBnIF || PIR3bits.RXB1IF || PIR3bits.RXB0IF)
 119 
    if (PIR3bits.RXBnIF || PIR3bits.RXB1IF || PIR3bits.RXB0IF)
122 
    {
 120 
    {
- 
 
 121 
        ECANCON=(ECANCON&0b00000)|(0b10000|(CANCON&0x0F));
- 
 
 122 
        if (RXB0CONbits.RXFUL) canGetPacket();
123 
                   
 123 
   
124 
 
 - 
 
125 
        // Get which buffer that is ful.
 - 
 
126 
             if (RXB0CONbits.RXFUL) { ECANCON=(ECANCON&0b00000)|0b10000; canGetPacket(); }
 - 
 
127 
        else if (RXB1CONbits.RXFUL) { ECANCON=(ECANCON&0b00000)|0b10001; canGetPacket(); }
 - 
 
128 
        else if (B0CONbits.RXFUL)   { ECANCON=(ECANCON&0b00000)|0b10010; canGetPacket(); }
 - 
 
129 
        else if (B1CONbits.RXFUL)   { ECANCON=(ECANCON&0b00000)|0b10011; canGetPacket(); }
 - 
 
130 
        else if (B2CONbits.RXFUL)   { ECANCON=(ECANCON&0b00000)|0b10100; canGetPacket(); }
 - 
 
131 
        else if (B3CONbits.RXFUL)   { ECANCON=(ECANCON&0b00000)|0b10101; canGetPacket(); }
 - 
 
132 
        else if (B4CONbits.RXFUL)   { ECANCON=(ECANCON&0b00000)|0b10110; canGetPacket(); }
 - 
 
133 
        else if (B5CONbits.RXFUL)   { ECANCON=(ECANCON&0b00000)|0b10111; canGetPacket(); }
 - 
 
134 
   
 - 
 
135 
        if (PIR3bits.RXBnIF) {PIR3bits.RXBnIF = 0;}
 124 
        if (PIR3bits.RXBnIF) {PIR3bits.RXBnIF = 0; return;}
136 
        if (PIR3bits.RXB1IF) {PIR3bits.RXB1IF = 0;}
 125 
        if (PIR3bits.RXB1IF) {PIR3bits.RXB1IF = 0; return;}
137 
        if (PIR3bits.RXB0IF) {PIR3bits.RXB0IF = 0;}
 126 
        if (PIR3bits.RXB0IF) {PIR3bits.RXB0IF = 0; return;}
138 
   
 - 
 
139 
    }
 127 
    }
140 
}
 128 
}
141 
 
 129 
 
142 
 
 130 
 
143 
/*
 131 
/*