Subversion Repositories hardware

* Z:\home\linus\Dokument\aumlHardware\schematics\HomeAutomation\AVR\expansion\RGBdriverModule\ltSpice\RGBW-driver.asc
D1 Vcc N006 LXK2-PW14
L1 N010 N012 50µ Ipk=1.25 Rser=0.165 Rpar=9425 Cpar=0
V1 Vcc 0 8 Rser=0.1 Cpar=10u
R1 N006 N010 0.1
M1 N012 Transistor 0 0 Si5902DC
D2 N012 Vcc B530C
V2 5Volt 0 5 Rser=0 Cpar=10u
R2 5Volt Transistor2 1k
V3 Transistor2 0 PULSE(0 5 35u 2n 2n 3u 8u 20) Rser=0 Cpar=10u
XU1 0 NC_01 NC_02 0 NC_03 LT1813
R3 Current N007 250k
R4 N009 N011 250k
R5 N009 N010 5k
R6 N007 N006 5k
R10 N001 N005 2k
R11 N002 Current 1k
R12 N003 N002 40k
R13 N004 N003 10
R14 5Volt N001 2k
R8 N004 0 10k
V4 N005 0 PULSE(0 5 30u 2n 2n 60u 100u 20) Rser=0 Cpar=10u
C1 Vcc N008 100n V=10 Irms=10.541 Rser=0.004 Lser=0
R9 N008 N010 0.01
XU3 N009 N007 Vcc 0 Current TLC07X_5V
XU2 0 0 0 0 NC_04 TLC07X_5V
R7 N003 N001 15k
R15 5Volt N011 500
R16 0 N011 10k
R17 N012 P001 500
C2 P001 0 10n
XU4 N002 N001 5Volt 0 N003 LM2901_ON
A1 N004 0 0 0 0 0 Transistor 0 BUF
.model D D
.lib C:\Program\LTC\LTspiceIV\lib\cmp\standard.dio
.model NMOS NMOS
.model PMOS PMOS
.lib C:\Program\LTC\LTspiceIV\lib\cmp\standard.mos
.tran 400u startup
* Detta är PWM-utgången på AVRen
* Frekvensen på switchningarna justeras med C1, ett för stort värde på C1 ger dock översväng...
* V2 är 5 volt från corecard
* Används för att styra utan\nregulator, ska alltså ej vara\nmed på expansionen
.LIB TLC074.mod
.LIB TLV2371.mod
.INC AD8646.mod
*****
* (c) ON SEMICONDUCTOR
* Models developed and under copyright by:
* ON SEMICONDUCTOR 
 
* ============================================================
* | Legal Notice: This material is intended for free  
* | software support. The file may be copied and distributed. 
* | However,reselling the material is illegal.
* ============================================================
 
* ============================================================      
* |    LM339, LM239, LM2901, LM2901V, NCV2901, MC3302
* |               Comparator MACRO-MODEL
* |           Designed in pSpice Version 9.2
* |
* | The content of this model is subject to change
* | without notice and may not be modified or altered
* | without permission from ON Semiconductor. This model
* | has been carefully checked and is believed to be
* | accurate, however ON Semiconductor does not assume 
* | liability for the use of this model or the results 
* | obtained from using it.
* ============================================================
 
* ============================================================
* Features: - Low Input Bias Current: 25 nA
*           - Low Input Offset Current: 5.0 nA
*           - Low Input Offset Voltage
*           - Input Common Mode Range to Ground Level
*           - Low Output Saturation Voltage: 130mV (Typ) @ 4mA
* ============================================================
 
* $Author: Vallabh Chilakapati $
* $Date: 18 Aug 2006 $
 
* NOTE: - Noise is not modeled.
*       - Temperature is not modeled.
*       - PSR is not modeled.
*       - Model is for single device only.  Simulated supply current is 1/4 of
*         total package current.
 
* Connections:
*                   Non-Inverting Input
*                   |   Inverting Input
*                   |   |  +ve Supply Voltage
*                   |   |  |   -ve Supply Voltage
*                   |   |  |   |   Output
*                   |   |  |   |   | 
.SUBCKT LM2901_ON  1   2  11  12  24
 
***** Input Stage *****
Q_Q1            4 1 6           QPNP1    
Q_Q2            7 2 9           QPNP2
I_I1            111 10          DC 0.6m
R_RC1           4 12            95.49 
R_RC2           7 12            95.49
R_RE1           10 6            45.49 
R_RE2           10 9            45.49
 
***** Gain Stage & Frequency Response Stage ***** 
E_Eref          14 0 poly(2) (12,0) (11,0) 0 0.09091 0.09091
R_Rgnd          11 0            100k
I_Ignd          0 11            0.43m
Vsup            111 11          0
G_Ignd          0 11            poly(1) (11,0)  0 0.00678m
G_G1            14 15 7 4       0.01047
R_Rc            14 15           13.3Meg 
C_Cc            14 15           0.00667n 
 
***** Output Stage *****
E_E1            22 14 15 14     1
V_F1            23 24           0
F_F1            11 0 V_F1       1
R_Rout          22 23           13
 
***** Output Voltage Limiting *****
D_D1            15 18           D10D1
D_D2            19 15           D10D1 
V_Voh           111 18          0.62
V_Vol           19 12           0.62
 
***** Models *****
.model QPNP1    PNP(Is=1E-15 Bf=8293.8)
.model QPNP2    PNP(Is=1E-15 Bf=9663.8)
.MODEL D10D1 D IS=1E-15 RS=1.000E-3 VJ=.75 BV=100E6
.ENDS
.lib LTC.lib
.backanno
.end