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774 linlun 1
* Z:\home\linus\Dokument\aumlHardware\schematics\HomeAutomation\AVR\expansion\RGBdriverModule\ltSpice\RGBW-driver.asc
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D1 Vcc N006 LXK2-PW14
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L1 N010 N012 50µ Ipk=1.25 Rser=0.165 Rpar=9425 Cpar=0
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V1 Vcc 0 8 Rser=0.1 Cpar=10u
774 linlun 5
R1 N006 N010 0.1
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M1 N012 Transistor 0 0 Si5902DC
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D2 N012 Vcc B530C
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V2 5Volt 0 5 Rser=0 Cpar=10u
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R2 5Volt Transistor2 1k
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V3 Transistor2 0 PULSE(0 5 35u 2n 2n 3u 8u 20) Rser=0 Cpar=10u
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XU1 0 NC_01 NC_02 0 NC_03 LT1813
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R3 Current N007 250k
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R4 N009 N011 250k
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R5 N009 N010 5k
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R6 N007 N006 5k
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R10 N001 N005 2k
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R11 N002 Current 1k
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R12 N003 N002 40k
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R13 N004 N003 10
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R14 5Volt N001 2k
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R8 N004 0 10k
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V4 N005 0 PULSE(0 5 30u 2n 2n 60u 100u 20) Rser=0 Cpar=10u
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C1 Vcc N008 100n V=10 Irms=10.541 Rser=0.004 Lser=0
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R9 N008 N010 0.01
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XU3 N009 N007 Vcc 0 Current TLC07X_5V
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XU2 0 0 0 0 NC_04 TLC07X_5V
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R7 N003 N001 15k
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R15 5Volt N011 500
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R16 0 N011 10k
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R17 N012 P001 500
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C2 P001 0 10n
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XU4 N002 N001 5Volt 0 N003 LM2901_ON
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A1 N004 0 0 0 0 0 Transistor 0 BUF
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.model D D
774 linlun 35
.lib C:\Program\LTC\LTspiceIV\lib\cmp\standard.dio
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.model NMOS NMOS
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.model PMOS PMOS
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.lib C:\Program\LTC\LTspiceIV\lib\cmp\standard.mos
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.tran 400u startup
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* Detta är PWM-utgången på AVRen
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* Frekvensen på switchningarna justeras med C1, ett för stort värde på C1 ger dock översväng...
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* V2 är 5 volt från corecard
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* Används för att styra utan\nregulator, ska alltså ej vara\nmed på expansionen
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.LIB TLC074.mod
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.LIB TLV2371.mod
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.INC AD8646.mod
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*****
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* (c) ON SEMICONDUCTOR
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* Models developed and under copyright by:
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* ON SEMICONDUCTOR 
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* ============================================================
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* | Legal Notice: This material is intended for free  
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* | software support. The file may be copied and distributed. 
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* | However,reselling the material is illegal.
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* ============================================================
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* ============================================================      
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* |    LM339, LM239, LM2901, LM2901V, NCV2901, MC3302
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* |               Comparator MACRO-MODEL
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* |           Designed in pSpice Version 9.2
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* |
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* | The content of this model is subject to change
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* | without notice and may not be modified or altered
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* | without permission from ON Semiconductor. This model
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* | has been carefully checked and is believed to be
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* | accurate, however ON Semiconductor does not assume 
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* | liability for the use of this model or the results 
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* | obtained from using it.
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* ============================================================
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* ============================================================
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* Features: - Low Input Bias Current: 25 nA
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*           - Low Input Offset Current: 5.0 nA
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*           - Low Input Offset Voltage
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*           - Input Common Mode Range to Ground Level
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*           - Low Output Saturation Voltage: 130mV (Typ) @ 4mA
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* ============================================================
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* $Author: Vallabh Chilakapati $
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* $Date: 18 Aug 2006 $
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* NOTE: - Noise is not modeled.
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*       - Temperature is not modeled.
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*       - PSR is not modeled.
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*       - Model is for single device only.  Simulated supply current is 1/4 of
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*         total package current.
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* Connections:
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*                   Non-Inverting Input
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*                   |   Inverting Input
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*                   |   |  +ve Supply Voltage
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*                   |   |  |   -ve Supply Voltage
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*                   |   |  |   |   Output
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*                   |   |  |   |   | 
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.SUBCKT LM2901_ON  1   2  11  12  24
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***** Input Stage *****
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Q_Q1            4 1 6           QPNP1    
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Q_Q2            7 2 9           QPNP2
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I_I1            111 10          DC 0.6m
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R_RC1           4 12            95.49 
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R_RC2           7 12            95.49
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R_RE1           10 6            45.49 
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R_RE2           10 9            45.49
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***** Gain Stage & Frequency Response Stage ***** 
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E_Eref          14 0 poly(2) (12,0) (11,0) 0 0.09091 0.09091
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R_Rgnd          11 0            100k
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I_Ignd          0 11            0.43m
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Vsup            111 11          0
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G_Ignd          0 11            poly(1) (11,0)  0 0.00678m
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G_G1            14 15 7 4       0.01047
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R_Rc            14 15           13.3Meg 
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C_Cc            14 15           0.00667n 
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***** Output Stage *****
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E_E1            22 14 15 14     1
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V_F1            23 24           0
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F_F1            11 0 V_F1       1
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R_Rout          22 23           13
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***** Output Voltage Limiting *****
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D_D1            15 18           D10D1
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D_D2            19 15           D10D1 
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V_Voh           111 18          0.62
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V_Vol           19 12           0.62
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***** Models *****
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.model QPNP1    PNP(Is=1E-15 Bf=8293.8)
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.model QPNP2    PNP(Is=1E-15 Bf=9663.8)
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.MODEL D10D1 D IS=1E-15 RS=1.000E-3 VJ=.75 BV=100E6
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.ENDS
742 linlun 134
.lib LTC.lib
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.backanno
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.end